CAJ | 학술논문

基于SMIC 0.18 μm RF-CMOS工艺,实现了一种工作于2.45 GHz的功率放大器,给出了电路仿真结果和电路版图.电路采用两级放大的结构,分别采用自偏置技术和电阻并联负反馈网络来缓解CMOS器件低击穿电压的限制,同时保证了稳定性的要求.为了提高线性度,采用一种集成的二极管线性化电路对有源器件的输入电容变化提供一种补偿机制,漏端的LC谐振网络和优化的栅偏置用来消除由跨导产生的非线性谐波.在3 V电源电压下,放大器功率增益为23 dB,输出1 dB压缩点约为25 dBm,对应的功率附加效率PAE可达35%.
기우SMIC 0.18 μm RF-CMOS공예,실현료일충공작우2.45 GHz적공솔방대기,급출료전로방진결과화전로판도.전로채용량급방대적결구,분별채용자편치기술화전조병련부반궤망락래완해CMOS기건저격천전압적한제,동시보증료은정성적요구.위료제고선성도,채용일충집성적이겁관선성화전로대유원기건적수입전용변화제공일충보상궤제,루단적LC해진망락화우화적책편치용래소제유과도산생적비선성해파.재3 V전원전압하,방대기공솔증익위23 dB,수출1 dB압축점약위25 dBm,대응적공솔부가효솔PAE가체35%.
A 2.45 GHz CMOS power amplifier (PA) was designed based on SMIC's 0.18 μm RF-CMOS technology.Simulation results and circuit layout were presented.A two-stage amplifier structure was employed, in which self-biasing and negative feedback of parallel resistors were adopted, respectively, to release restrictions of oxide breakdown and ensure stable operation.To improve linearity, an integrated diode linear circuit was used to provide compensation for input capacitance variation of active devices.And an LC resonance network at drain and an optimized gate bias were applied to avoid non-linear harmonics resulted from g_m.At 3 V supply voltage, the proposed PA had a power gain of 23 dB,a P_(1dB) of 25 dBm and a power added efficiency (PAE) up to 35%.