CAJ | 학술논문

论述了通过优化难熔金属栅电极的溅射工艺及采用适当的退火温度修复损伤来提高3nm栅氧W/TiN叠层栅MOS电容的性能.实验选取了合适的TiN厚度来减小应力,以较小的TiN溅射率避免溅射过程对栅介质的损伤,并采用了较高的N2/Ar比率在TiN溅射过程中进一步氮化了栅介质.实验得到了高质量的C-V曲线,并成功地把Nss(表面态密度)降低到了8×1010/cm2以下,达到了与多晶硅栅MOS电容相当的水平.
논술료통과우화난용금속책전겁적천사공예급채용괄당적퇴화온도수복손상래제고3nm책양W/TiN첩층책MOS전용적성능.실험선취료합괄적TiN후도래감소응력,이교소적TiN천사솔피면천사과정대책개질적손상,병채용료교고적N2/Ar비솔재TiN천사과정중진일보담화료책개질.실험득도료고질량적C-V곡선,병성공지파Nss(표면태밀도)강저도료8×1010/cm2이하,체도료여다정규책MOS전용상당적수평.
The technique to improve the performance of W/TiN stacked gate MOS capacitor with 3nm gate oxide is reported by optimizing the sputtering process of a refractory metal gate electrode and adopting a proper anneal temperature to eliminate the damages. Specific methods involved in the optimization of sputtering process include:selecting a proper TiN thickness to reduce stresses;using a smaller sputtering rate to suppress the damages to gate dielectric and adopting a higher N2/Ar ratio during the TiN sputtering process to further nitride the gate dielectric.With these measures,excellent C-V curves are obtained and surface state density (Nss) is successfully reduced to below 8 × 1010cm-2,which is comparable to the polysilicon gate MOS capacitor.