VLSI平面布图规划中模拟退火算法的加速策略
VLSI평면포도규화중모의퇴화산법적가속책략
Simulation annealing accelerating in VLSI floorplanning
  • 万方数据
    计算机工程与应用 계산궤공정여응용
    COMPUTER ENGINEERING AND APPLICATIONS
    2009年 33期 64-66,69 ,共4页

    周晓方%王琳凯%陈珊珊%赵长虹

    주효방%왕림개%진산산%조장홍

    超大规模集成电路(VLSI)%布图规划%模拟退火%加速 超大規模集成電路(VLSI)%佈圖規劃%模擬退火%加速
    초대규모집성전로(VLSI)%포도규화%모의퇴화%가속
    Very Large Scale Integrated circuites(VLSI)%floorplanning%simulation annealing%accelerate
    布局是现代VLSI物理设计中十分关键的步骤,而模拟退火等智能算法在针对宏模块布局的平面布图规划问题中得到广泛应用.针对应用于VLSI平面布图规划的模拟退火算法进行了研究和分析,并针对布图本身特性在退火算法中采用了一种导向性的邻域构造策略来加速算法的收敛,有效地提高了平面布图规划中模拟退火算法的搜索效率.
    포국시현대VLSI물리설계중십분관건적보취,이모의퇴화등지능산법재침대굉모괴포국적평면포도규화문제중득도엄범응용.침대응용우VLSI평면포도규화적모의퇴화산법진행료연구화분석,병침대포도본신특성재퇴화산법중채용료일충도향성적린역구조책략래가속산법적수렴,유효지제고료평면포도규화중모의퇴화산법적수색효솔.
    Floorplanning and placement are key steps in modem VLSI physical design,and Simulation Annealing(SA) is widely used in floorplanning algorithms.This paper has research on SA algorithm used in floorplanning and accelerates the convergence rate of the algorithm through designing new neighborhood solution generating strategies in the SA process,and gets better efficiency.
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