半导体学报
半導體學報
반도체학보
CHINESE JOURNAL OF SEMICONDUCTORS
2006年
11期
1911-1917
,共7页
刘军华%廖怀林%殷俊%黄如%张兴
劉軍華%廖懷林%慇俊%黃如%張興
류군화%료부림%은준%황여%장흥
宽带%粗调环路%频率综合器%压控振荡器
寬帶%粗調環路%頻率綜閤器%壓控振盪器
관대%조조배로%빈솔종합기%압공진탕기
wide-band%coarse tuning loop%frequency synthesizer%voltage-controlled oscillator
提出了一种用于宽带、双环路频率综合器的粗调环路结构.该粗调环路由数字电路设计实现,包含逐次逼近寄存器和新结构的频率比较单元两个模块.其中,频率比较单元在一定的参考时间内对预分频器的输出信号周期进行计数,然后通过比较计数结果与预设值的大小来估计VCO输出频率.对比较误差进行了详细分析,分析表明,在一定的比较时间内该结构的比较误差比现有结构小20倍,而且由于重复利用可编程分频器作为粗调环路的一部分,整体电路也大为简化.
提齣瞭一種用于寬帶、雙環路頻率綜閤器的粗調環路結構.該粗調環路由數字電路設計實現,包含逐次逼近寄存器和新結構的頻率比較單元兩箇模塊.其中,頻率比較單元在一定的參攷時間內對預分頻器的輸齣信號週期進行計數,然後通過比較計數結果與預設值的大小來估計VCO輸齣頻率.對比較誤差進行瞭詳細分析,分析錶明,在一定的比較時間內該結構的比較誤差比現有結構小20倍,而且由于重複利用可編程分頻器作為粗調環路的一部分,整體電路也大為簡化.
제출료일충용우관대、쌍배로빈솔종합기적조조배로결구.해조조배로유수자전로설계실현,포함축차핍근기존기화신결구적빈솔비교단원량개모괴.기중,빈솔비교단원재일정적삼고시간내대예분빈기적수출신호주기진행계수,연후통과비교계수결과여예설치적대소래고계VCO수출빈솔.대비교오차진행료상세분석,분석표명,재일정적비교시간내해결구적비교오차비현유결구소20배,이차유우중복이용가편정분빈기작위조조배로적일부분,정체전로야대위간화.
A new coarse tuning loop for a wide-band dual-loop frequency synthesizer is presented. The coarse tun ing structure is composed of two digital modules, including a successive approximation register and a frequency comparator with a novel structure. The frequency comparator counts the prescaler cycles within a certain reference time and compares the number with preset data to estimate the VCO frequency. The frequency comparison error is analyzed in detail. Within a given coarse tuning time,our proposed structure shows a comparison error 20times smaller than that of other reported structures. This structure also reuses the programmable divider as a part of the coarse tuning loop so that the circuit is greatly simplified.