CAJ | 학술논문

超宽带(UWB)通信通过传输能量极低的极短脉冲和占用超大带宽来完成短距离的高速通信.由于其极高的数据传输率,抗多径衰落,低成本和低功耗等诸多优点,成为短距离无线通信系统的研究热点.在有诸多优点的同时, 它的实现又面临着很多挑战,比如系统采样率极高,对同步精度要求极高,信道估计极为复杂.而跳时延发射参考(Delay Hopped Transmitted Reference-DHTR)系统是超宽带系统的一个低复杂度的实际可行的方案:通过在模拟域做相关操作,大大降低了系统的采样率和数字信号处理的数据量;把传输的参考脉冲作为信号脉冲的污损模板,绕过了复杂的信道估计问题.本文的工作是AIRLINK[4]项目演示任务的一部分.文中说明了DHTR UWB通信系统的工作原理;分析给出系统的框架结构;通过对文献[3]给出的接收信号数学模型进行简化,分析得到了同步解调的方法;并针对DHTR系统符号同步方法,提出了两种电路实现的结构-串行同步和并行同步结构;然后用FPGA实现了DHTR系统发射端和接收端的基带数字信号处理部分;最后搭建了一个完整的验证平台,对系统进行了功能验证.此系统的电路综合结果表明系统实现了低复杂度、低成本,证明了它在超宽带通信中的可行性和实用性.
초관대(UWB)통신통과전수능량겁저적겁단맥충화점용초대대관래완성단거리적고속통신.유우기겁고적수거전수솔,항다경쇠락,저성본화저공모등제다우점,성위단거리무선통신계통적연구열점.재유제다우점적동시, 타적실현우면림착흔다도전,비여계통채양솔겁고,대동보정도요구겁고,신도고계겁위복잡.이도시연발사삼고(Delay Hopped Transmitted Reference-DHTR)계통시초관대계통적일개저복잡도적실제가행적방안:통과재모의역주상관조작,대대강저료계통적채양솔화수자신호처리적수거량;파전수적삼고맥충작위신호맥충적오손모판,요과료복잡적신도고계문제.본문적공작시AIRLINK[4]항목연시임무적일부분.문중설명료DHTR UWB통신계통적공작원리;분석급출계통적광가결구;통과대문헌[3]급출적접수신호수학모형진행간화,분석득도료동보해조적방법;병침대DHTR계통부호동보방법,제출료량충전로실현적결구-천행동보화병행동보결구;연후용FPGA실현료DHTR계통발사단화접수단적기대수자신호처리부분;최후탑건료일개완정적험증평태,대계통진행료공능험증.차계통적전로종합결과표명계통실현료저복잡도、저성본,증명료타재초관대통신중적가행성화실용성.
Ultra Wideband(UWB) system is an attractive high speed wireless communication scheme for short range communication. It transmits extremely short pulses, which occupy ultra wide band. It gets more and more attention, because of its high data capability, fading resistance, low cost and low power, etc. While having so many advantages, it also confronts many challenges, such as very high system sampling rate, rigor request for synchronization and formidable channel estimation. Delay-Hopped Transmitted Reference(DHTR) system is a low complexity and practical scheme for UWB communication. It drags down the sampling rate of the system by dealing with correlation in the analog domain and bypasses the formidable channel estimation by using the reference pulse as a dirty template for the signal pulse. The work shown in this paper is part of the demonstration of AIRLINK[4] project. The paper explains the working principle of the DHTR system and proposes the system architecture. It shows the synchronization and detection method by analyzing and simplifying the signal model proposed in reference[3]. Two circuit architectures for synchronization are proposed: the serial solution and the parallel solution. Then the digital signal processing parts of the DHTR system are implemented on a Field Programmable Gate Array(FPGA). A complete verification platform is constructed to verify the function of the system. The low complexity and low cost implementation of the whole system proves its possibility and practicability in UWB communications.