CAJ | 학술논문

设计了一个单芯片实现的用于DVB-C的QAM解调器.片上集成有3.3V 10位精度的40MSPS模数转换器及FEC前向纠错解码器.该芯片支持4～256QAM多种模式,最高码率达80Mbps,具有宽的载波频偏捕获范围.采用改进的算法及VLSI实现结构,性能稳定,面积优化.采用SMIC 0.25μm 1P5M混合信号CMOS工艺制造,面积为3.5mm×3.5mm,最大功耗为447mW.
설계료일개단심편실현적용우DVB-C적QAM해조기.편상집성유3.3V 10위정도적40MSPS모수전환기급FEC전향규착해마기.해심편지지4～256QAM다충모식,최고마솔체80Mbps,구유관적재파빈편포획범위.채용개진적산법급VLSI실현결구,성능은정,면적우화.채용SMIC 0.25μm 1P5M혼합신호CMOS공예제조,면적위3.5mm×3.5mm,최대공모위447mW.
A single-chip DVB-C quadrature amplitude modulation(QAM) demodulator is proposed,which integrates a 3.3V 10bit 40MSPS analog-to-digital converter and a forward error correction decoder. The demodulator chip can support 4～256 QAM with variable bit rate up to 80Mbps. It features a wide carrier offset acquisition range,optimal demodulation algorithm,and small circuit area. The chip is implemented in SMIC 0.25μm 1P5M mixed-signal CMOS technology with a die size of 3.5mm× 3.5mm. The maximum power consumption is 447mW.