半导体技术
半導體技術
반도체기술
SEMICONDUCTOR TECHNOLOGY
2010年
3期
233-236,298
,共5页
半导体%闪存%叠层封装%金线键合%长线键合%"塌线"现象
半導體%閃存%疊層封裝%金線鍵閤%長線鍵閤%"塌線"現象
반도체%섬존%첩층봉장%금선건합%장선건합%"탑선"현상
semiconductor%flash memory%MCP%Au wire bonding%long wire bonding%wire "lay down" phenomena
目前,在半导体闪存多芯片的金线键合工艺中,为满足堆叠芯片不断增加等结构需要,键合线弧要求更低、更长,制造工艺变得相对更加复杂.针对生产过程中常遇到的"塌线"问题,通过对金线键合工艺中线弧形成动作的过程分析,以金线"弹动"现象为线索,探究了生产过程中"塌线"问题产生的原因,并给出了相应解决方案.经过此研究,长线键合的生产工艺能力得到加强,其成果对新封装产品的研发及基板设计具有有益的参考价值.
目前,在半導體閃存多芯片的金線鍵閤工藝中,為滿足堆疊芯片不斷增加等結構需要,鍵閤線弧要求更低、更長,製造工藝變得相對更加複雜.針對生產過程中常遇到的"塌線"問題,通過對金線鍵閤工藝中線弧形成動作的過程分析,以金線"彈動"現象為線索,探究瞭生產過程中"塌線"問題產生的原因,併給齣瞭相應解決方案.經過此研究,長線鍵閤的生產工藝能力得到加彊,其成果對新封裝產品的研髮及基闆設計具有有益的參攷價值.
목전,재반도체섬존다심편적금선건합공예중,위만족퇴첩심편불단증가등결구수요,건합선호요구경저、경장,제조공예변득상대경가복잡.침대생산과정중상우도적"탑선"문제,통과대금선건합공예중선호형성동작적과정분석,이금선"탄동"현상위선색,탐구료생산과정중"탑선"문제산생적원인,병급출료상응해결방안.경과차연구,장선건합적생산공예능력득도가강,기성과대신봉장산품적연발급기판설계구유유익적삼고개치.
Currently multi chips have been stacked into one MCP assembly for flash memory fabrication. To fulfill the requirement of stacking more chips, lower and longer wire looping is needed in the wire bonding process. Thus, the process becomes more complex. Focusing on the wire "lay down" problem encountered in the wire bonding production, a series of evaluation and experiments were elaborated on looping behavior and the wire bouncing phenomena. Besides that the causes of wire "lay down" were given as well as the short term and long term solutions. With the results of research, the process capability of long wire bonding was enhanced. The information and knowledge obtained would be good reference for the package development of new devices and substrate design.