电子设计工程
電子設計工程
전자설계공정
ELECTRONIC DESIGN ENGINEERING
2011年
24期
177-180
,共4页
姚婧婧%赵红东%毛键%赵彦凤
姚婧婧%趙紅東%毛鍵%趙彥鳳
요청청%조홍동%모건%조언봉
压控振荡器%相位噪声%ADS%二次谐波滤波技术
壓控振盪器%相位譟聲%ADS%二次諧波濾波技術
압공진탕기%상위조성%ADS%이차해파려파기술
VCO%phase noise%ADS%filtration of the second harmonic technique
本文设计了一个应用于高频锁相环(PLL)系统的负阻LC压控振荡器,在传统LC压控振荡器基础上,通过采用二次谐波滤波技术降低了振荡器的相位噪声,并完成了电路的仿真。仿真结果表明,该压控振荡器的振荡频率在1.9—2.1GHz,其频率调节范围达到200MHz,并且在距中心频率1MHz处其相位噪声为-148.825dBc/Hz。
本文設計瞭一箇應用于高頻鎖相環(PLL)繫統的負阻LC壓控振盪器,在傳統LC壓控振盪器基礎上,通過採用二次諧波濾波技術降低瞭振盪器的相位譟聲,併完成瞭電路的倣真。倣真結果錶明,該壓控振盪器的振盪頻率在1.9—2.1GHz,其頻率調節範圍達到200MHz,併且在距中心頻率1MHz處其相位譟聲為-148.825dBc/Hz。
본문설계료일개응용우고빈쇄상배(PLL)계통적부조LC압공진탕기,재전통LC압공진탕기기출상,통과채용이차해파려파기술강저료진탕기적상위조성,병완성료전로적방진。방진결과표명,해압공진탕기적진탕빈솔재1.9—2.1GHz,기빈솔조절범위체도200MHz,병차재거중심빈솔1MHz처기상위조성위-148.825dBc/Hz。
This paper designs a negative resistance LC voltage-controlled oscillator for high-frequency PLL system. Based on the structure of conventional LC VCO, a filtration of the second harmonic technique was included to reduce the phase noise and the circuit simulation is completed by the software of Agilent's ADS. The simulation results show that this LC voltagecontrolled oscillator achieved to a widely turn the frequency and the range is 1.9- 2.1GHz. The phase noise away from the center frequency of 1MHz can reach -148.825dBc/Hz.