CAJ | 학술논문

对该编码技术进行了深入的研究,并在此基础上实现了2.4 kbps MELP声码器的计算机模拟,提出了对MELP多级矢量量化搜索方法的改进,以及用两片TMS320C31并行处理实现MELP算法的硬件电路设计。
대해편마기술진행료심입적연구,병재차기출상실현료2.4 kbps MELP성마기적계산궤모의,제출료대MELP다급시량양화수색방법적개진,이급용량편TMS320C31병행처리실현MELP산법적경건전로설계。
In this paper it is firstly analyzed what the MELP synthesis model modifies as composed to LPC. Secondly a 2.4 kbps vocoder based on MELP algorithm is simulated in PC platform. Eventually according to analysis of results an algrorithm method is introduced aimed at improving the coding performance of Multistage vector quantization. Furthermore with a sidebyside operation mechanism of MELP vocoderusing two TMS320C31 DSP we desigin the hardware circuit to realize the MELP algorithm.