CAJ | 학술논문

提出了矩阵寻址方式的场发射驱动电路.设计出16级灰度显示的阴极驱动电路以及栅极驱动电路,并对其进行了性能仿真,仿真结果显示驱动电路性能优越.开发出与0.8 μm标准CMOS工艺兼容的高压CMOS工艺,有效提高了驱动电路的集成度,并降低了生产成本.成功研制出用于场发射驱动电路输出端的100 V高低压电平转换电路,实验测得空载情况下电路的上升时间和下降时间分别为35,60 ns,能够满足高压驱动电路的频率要求.
제출료구진심지방식적장발사구동전로.설계출16급회도현시적음겁구동전로이급책겁구동전로,병대기진행료성능방진,방진결과현시구동전로성능우월.개발출여0.8 μm표준CMOS공예겸용적고압CMOS공예,유효제고료구동전로적집성도,병강저료생산성본.성공연제출용우장발사구동전로수출단적100 V고저압전평전환전로,실험측득공재정황하전로적상승시간화하강시간분별위35,60 ns,능구만족고압구동전로적빈솔요구.
A high voltage driver IC for matrix addressed FED is presented in this article. The driver IC including gate driving circuit and cathode driving circuit with 16 gray levels by PWM method were developed and simulated. And simulation results showed good performance. The HVCMOS process which is compatible with 0.8 μm standard CMOS technology had been developed to reduce the production cost and increase the packing density of panel driving system. The rise and fall time of level shifter, which acts as the output stage of FED driver IC, was 35 ns and 60 ns, respectively in the condition of no capacitor loads.