沈阳工业大学学报
瀋暘工業大學學報
침양공업대학학보
JOURNAL OF SHENYANG POLYTECHNIC UNIVERSITY
2001年
1期
49-51
,共3页
曹承志%曲红梅%路战红%杨晓波
曹承誌%麯紅梅%路戰紅%楊曉波
조승지%곡홍매%로전홍%양효파
数字触发器%60°段方式%FIFO寄存器%晶闸管变流系统
數字觸髮器%60°段方式%FIFO寄存器%晶閘管變流繫統
수자촉발기%60°단방식%FIFO기존기%정갑관변류계통
介绍一种新型的全数字触发器,它突破8位单片机位数的局限,提出的三个32位的FIFO寄存器,与同步中断信号有机配合,降低了对硬件的要求,又减少了移相定时过程占用CPU的时间.经实验运行表明,该触发器结构简单,算法快捷,运行可靠,可满足高精度晶闸管变流系统的要求.
介紹一種新型的全數字觸髮器,它突破8位單片機位數的跼限,提齣的三箇32位的FIFO寄存器,與同步中斷信號有機配閤,降低瞭對硬件的要求,又減少瞭移相定時過程佔用CPU的時間.經實驗運行錶明,該觸髮器結構簡單,算法快捷,運行可靠,可滿足高精度晶閘管變流繫統的要求.
개소일충신형적전수자촉발기,타돌파8위단편궤위수적국한,제출적삼개32위적FIFO기존기,여동보중단신호유궤배합,강저료대경건적요구,우감소료이상정시과정점용CPU적시간.경실험운행표명,해촉발기결구간단,산법쾌첩,운행가고,가만족고정도정갑관변류계통적요구.
A new type of the complete digital trigger is introduced, which goes beyond the limit of byte capacity of 8 bits single chip microcomputer. Three FIFO registers with 32 bits are given out, which are in original coordination with synchronous interruptable signals so that reducing demands on hardware and relieving taking up time of CPU during phase shifting timed. The experiment shows that the triggering - controller have the features of simple structure, arithmetic short - cut, running reliability and can satisfy the needs of the high accuracy system with thyristor converter.