CAJ | 학술논문

采用222级联全差分结构和低电压、高线性度的电路设计实现了高动态范围、低过采样率的ΣΔ调制器.在1.8V工作电压,4MHz采样频率以及80kHz输入信号的条件下,该调制器能够达到81dB的动态范围,功耗仅为5mW.结果表明此结构及电路设计可以用于在低电压工作环境的高精度模数转换中.
채용222급련전차분결구화저전압、고선성도적전로설계실현료고동태범위、저과채양솔적ΣΔ조제기.재1.8V공작전압,4MHz채양빈솔이급80kHz수입신호적조건하,해조제기능구체도81dB적동태범위,공모부위5mW.결과표명차결구급전로설계가이용우재저전압공작배경적고정도모수전환중.
This work demonstrates that the ΣΔ modulator with a low oversampling ratio is a viable option for the high-resolution digitization in a low-voltage environment.Low power dissipation is achieved by designing a low-OSR modulator based on differential cascade architecture,while large signal swing maintained to achieve a high dynamic range in the low-voltage environment.Operating from a voltage supply of 1.8V,the sixth-order cascade modulator at a sampling frequency of 4-MHz with an OSR of 24 achieves a dynamic range of 81dB for a 80-kHz test signal,while dissipating only 5mW.