CAJ | 학술논문

应用Altera公司的Quartus Ⅱ、NIOSⅡIDE开发软件和SOPC Builder工具,采用cy-cloneⅡ系列FPGA芯片--EP2C35,设计了质子式旋进磁力仪原理主机硬件平台.构建和配置了Nios Ⅱ软核处理器、IO接口电路及传感器控制电路,编写了全数字锁相环、等精度计数器等硬件单元的VHDL代码,实现了质子旋进式磁力仪器原理主机核心电路的单芯片系统逻辑设计.研究了μClinux嵌入式操作系统的配置技术,并建立了基于Nios Ⅱ软核处理器的μClinux交叉编译环境,成功将μClinux移植到NiosⅡ环境中.在该系统下编写了主机硬件平台的设备驱动程序和用户程序,实现了原理样机各设计功能,达到了预期目标.
응용Altera공사적Quartus Ⅱ、NIOSⅡIDE개발연건화SOPC Builder공구,채용cy-cloneⅡ계렬FPGA심편--EP2C35,설계료질자식선진자력의원리주궤경건평태.구건화배치료Nios Ⅱ연핵처리기、IO접구전로급전감기공제전로,편사료전수자쇄상배、등정도계수기등경건단원적VHDL대마,실현료질자선진식자력의기원리주궤핵심전로적단심편계통라집설계.연구료μClinux감입식조작계통적배치기술,병건립료기우Nios Ⅱ연핵처리기적μClinux교차편역배경,성공장μClinux이식도NiosⅡ배경중.재해계통하편사료주궤경건평태적설비구동정서화용호정서,실현료원리양궤각설계공능,체도료예기목표.
Using Altera's Quartus Ⅱ, Nios Ⅱ IDE and SOPC Builder develop-ment tools, the proton precession magnetometer principle host hardware plat-form is designed with a cyclone Ⅱ series FPGA chip (EP2C35). The single-chip system-logic design of the proton precession magnetometer principle host core circuit is achieved by building and configuring the Nios Ⅱ soft-core processor, developing the IO interface and sensor control circuits, and programming somehardware units' VHDL code, for example, the equal precision cymometer and the DPLL. Through researching the embedded operating system configuration technology and building the NIOS Ⅱ soft-core processor's μClinux cross-com-pile environment, the μClinux system is transplanted to the NIOS Ⅱ environ-ment. Another important task of this study is writing the code for device drivers and user programs. Through these works, the design has realized the host func-tion and achieved the expected target.