固体电子学研究与进展
固體電子學研究與進展
고체전자학연구여진전
RESEARCH & PROGRESS OF SOLID STATE ELECTRONICS
2009年
4期
589-592
,共4页
杨洪东%李竞春%于奇%周谦%谭开州%张静
楊洪東%李競春%于奇%週謙%譚開州%張靜
양홍동%리경춘%우기%주겸%담개주%장정
锗硅基区%渐变温度控制%图形外延%锗硅BiCMOS
鍺硅基區%漸變溫度控製%圖形外延%鍺硅BiCMOS
타규기구%점변온도공제%도형외연%타규BiCMOS
SiGe base%gradual temperature control%pattern epitaxial%SiGe BiCMOS
为抑制SiGe HBT基区生长过程中岛状物生成,降低位错密度,基于渐变温度控制方法和图形外延技术,结合 BiCMOS工艺,研发了在Si衬底上制备高质量Si_(1-x)Ge_x基区的外延生长方法.通过原子力显微镜(AFM)、扫描电子显微镜(SEM)、X射线双晶衍射(XRD)测试,显示所生长的Si_(1-x)Ge_x基区表面粗糙度为0.45 nm,穿透位错密度是0.3×10~3~1.2×10~3 cm~(-2),在窗口边界与基区表面未发现位错堆积与岛状物.结果表明,该方法适宜生长高质量的SiGe HBT基区,可望应用于SiGe BiCMOS工艺中HBT的制备.
為抑製SiGe HBT基區生長過程中島狀物生成,降低位錯密度,基于漸變溫度控製方法和圖形外延技術,結閤 BiCMOS工藝,研髮瞭在Si襯底上製備高質量Si_(1-x)Ge_x基區的外延生長方法.通過原子力顯微鏡(AFM)、掃描電子顯微鏡(SEM)、X射線雙晶衍射(XRD)測試,顯示所生長的Si_(1-x)Ge_x基區錶麵粗糙度為0.45 nm,穿透位錯密度是0.3×10~3~1.2×10~3 cm~(-2),在窗口邊界與基區錶麵未髮現位錯堆積與島狀物.結果錶明,該方法適宜生長高質量的SiGe HBT基區,可望應用于SiGe BiCMOS工藝中HBT的製備.
위억제SiGe HBT기구생장과정중도상물생성,강저위착밀도,기우점변온도공제방법화도형외연기술,결합 BiCMOS공예,연발료재Si츤저상제비고질량Si_(1-x)Ge_x기구적외연생장방법.통과원자력현미경(AFM)、소묘전자현미경(SEM)、X사선쌍정연사(XRD)측시,현시소생장적Si_(1-x)Ge_x기구표면조조도위0.45 nm,천투위착밀도시0.3×10~3~1.2×10~3 cm~(-2),재창구변계여기구표면미발현위착퇴적여도상물.결과표명,해방법괄의생장고질량적SiGe HBT기구,가망응용우SiGe BiCMOS공예중HBT적제비.
To decrease the dislocation density and prevent Ge island from forming, a pattern epitaxial technology with gradual temperature control has been developed for fabricating SiGe HBT base layer which is compatible with BiCMOS process. The measurement results of SEM, AFM, XRD show that RMS roughness is 0.45 nm, the threading dislocation density is 0.3×10~3 cm~(-2)~1.2×10~3 cm~(-2), and dislocation accumulation and Ge island aren't found on the boundary of the windows and the surface. These indicate the process technology could grow high quality SiGe base layer and be applied to fabricate HBT in SiGe BiCMOS process.