清华大学学报（英文版）
清華大學學報（英文版）
청화대학학보（영문판）
TSINGHUA SCIENCE AND TECHNOLOGY
2010年
3期
259-264
,共6页
BiCMOS工艺%低噪声放大器%放大器电路%静电感应%ESD保护结构%射频集成电路%静电放电%噪音分析
BiCMOS工藝%低譟聲放大器%放大器電路%靜電感應%ESD保護結構%射頻集成電路%靜電放電%譟音分析
BiCMOS공예%저조성방대기%방대기전로%정전감응%ESD보호결구%사빈집성전로%정전방전%조음분석
electrostatic discharge （ESD） protection%low-noise amplifier （LNA）%noise figures （NFs）%radio frequency （RF）%integrated circuits （IC）
Electrostatic discharge （ESD） induced parasitic effects have serious impacts on performance of radio frequency （RF） integrated circuits （IC）. This paper discusses a comprehensive noise analysis procedure for ESD protection structures and their negative influences on RF ICs. Noise figures （NFs） of commonly used ESD protection structures and their impacts on a single-chip 5.5 GHz low-noise amplifier （LNA） circuit were depicted. A design example in 0.18 μm SiGe BiCMOS was presented. Measurement results confirm that significant noise degradation occurs in the LNA circuit due to ESD-induced noise effects. A practical design procedure for ESD-protected RF ICs is provided for real-world RF IC optimization.
