CAJ | 학술논문

描述了一种用综合性方法设计的亚50nm自对准双栅MOSFET,该结构能够在改进的主流CMOS技术上实现.在这种方法下,由于各种因素的影响,双栅器件的栅长、硅岛厚度呈现出不同的缩减限制.同时,侧面绝缘层在器件漏电流和电路速度上表现出特有的宽度效应.建立了关于这种效应的模型,并提供了相关的设计指导.另外,还讨论了一种新型的沟道掺杂设计,命名为SCD.利用SCD的DG器件能够在体反模式和阈值控制间取得较好的平衡.最后,总结了制作一个SADG MOSFET 的指导原则.
묘술료일충용종합성방법설계적아50nm자대준쌍책MOSFET,해결구능구재개진적주류CMOS기술상실현.재저충방법하,유우각충인소적영향,쌍책기건적책장、규도후도정현출불동적축감한제.동시,측면절연층재기건루전류화전로속도상표현출특유적관도효응.건립료관우저충효응적모형,병제공료상관적설계지도.령외,환토론료일충신형적구도참잡설계,명명위SCD.이용SCD적DG기건능구재체반모식화역치공제간취득교호적평형.최후,총결료제작일개SADG MOSFET 적지도원칙.
A comprehensive way to design a sub-50nm SADG MOSFET with the ability of being fabricated by improved CMOS technique is described.Under this way,the gate length and thickness of Si island of DG device show many different scaling limits for various elements.Meanwhile,the spacer insulator shows a kind of width thickness on device drain current and circuit speed.A model about that effect is developed and offers design consideration for future.A new design of channel doping profile,called SCD,is also discussed here in detail.The DG device with SCD can achieve a good balance between the volume inversion operation mode and the control of Vth.Finally,a guideline to make a SADG MOSFET is presented.