红外与激光工程
紅外與激光工程
홍외여격광공정
INFRARED AND LASER ENGINEERING
2010年
2期
201-205,231
,共6页
李辛毅%姚素英%赵毅强%陈洪钧%周航宇
李辛毅%姚素英%趙毅彊%陳洪鈞%週航宇
리신의%요소영%조의강%진홍균%주항우
自偏置反馈电流镜%读出集成电路%红外焦平面阵列%相关双采样电路
自偏置反饋電流鏡%讀齣集成電路%紅外焦平麵陣列%相關雙採樣電路
자편치반궤전류경%독출집성전로%홍외초평면진렬%상관쌍채양전로
Self-bias feedback current mirror%Readout integrate circuit%Infrared focal plane array%Correlated double sampling circuit
针对高精度红外焦平面阵列应用设计了一种具有高注入效率、大动态范围、稳定的探测器偏压、小面积和低功耗的自偏置电流镜注入CMOS读出电路.所设计的电路结构包括一种由自偏置的宽摆幅PMOS共源共栅电流镜和NMOS电流镜构成的反馈结构读出单元电路和相关双采样电路.对所设计电路采用Chartered 0.35 μm CMOS工艺进行了流片.测试结果显示:电路线性度达到了99%,探测器两端偏压小于1mV.电路输入阻抗近似为0,单元电路面积为10μm×15μm,功耗小于0.4μW.电量存储能力3108电子.测试结果表明:电路功能和性能都达到了设计要求.
針對高精度紅外焦平麵陣列應用設計瞭一種具有高註入效率、大動態範圍、穩定的探測器偏壓、小麵積和低功耗的自偏置電流鏡註入CMOS讀齣電路.所設計的電路結構包括一種由自偏置的寬襬幅PMOS共源共柵電流鏡和NMOS電流鏡構成的反饋結構讀齣單元電路和相關雙採樣電路.對所設計電路採用Chartered 0.35 μm CMOS工藝進行瞭流片.測試結果顯示:電路線性度達到瞭99%,探測器兩耑偏壓小于1mV.電路輸入阻抗近似為0,單元電路麵積為10μm×15μm,功耗小于0.4μW.電量存儲能力3108電子.測試結果錶明:電路功能和性能都達到瞭設計要求.
침대고정도홍외초평면진렬응용설계료일충구유고주입효솔、대동태범위、은정적탐측기편압、소면적화저공모적자편치전류경주입CMOS독출전로.소설계적전로결구포괄일충유자편치적관파폭PMOS공원공책전류경화NMOS전류경구성적반궤결구독출단원전로화상관쌍채양전로.대소설계전로채용Chartered 0.35 μm CMOS공예진행료류편.측시결과현시:전로선성도체도료99%,탐측기량단편압소우1mV.전로수입조항근사위0,단원전로면적위10μm×15μm,공모소우0.4μW.전량존저능력3108전자.측시결과표명:전로공능화성능도체도료설계요구.
A high injection effectivity,large dynamic range,stable detector bias,small area and low power consumpfion CMOS readout circuit was proposed.A high-swing self-bias P-type cascodc current milTor and an N-type current mirror to form the feedback structure followed by a correlated double sampling(CDS)circuit were employed in this structure.An experimental chip had been fabricated in Charter 0.35μm CMOS process.Experimental results show that the detector bias error in this structure is less than 1 mV;the input resistance is close to ideal value of zero.Unit-cell occupies 10 μm×15μm area and consumes less than 0.4μW power.Charge storage capacity is 3×108 electrons.The linearity of the designed circuit is almost 99%.And the function and performance of the proposed readout circuit have been verified by experimental results.