CAJ | 학술논문

提出一种输出低于1V的、无电阻高电源抑制比的CMOS带隙基准源(BGR).该电路适用于片上电源转换器.用HJTC0.18μm CMOS工艺设计并流片实现了该带隙基准源,芯片面积(不包括pad和静电保护电路)为0.031mm2.测试结果表明,采用前调制器结构,带隙基准源电路的输出在100Hz与lkHz处分别获得了-70与-62dB的高电源抑制比.电路输出一个0.5582V的稳定参考电压,当温度在0～85℃范围内变化时,输出电压的变化仅为1.5mV.电源电压VDD在2.4～4V范围内变化时,带隙基准输出电压的变化不超过2mV.
제출일충수출저우1V적、무전조고전원억제비적CMOS대극기준원(BGR).해전로괄용우편상전원전환기.용HJTC0.18μm CMOS공예설계병류편실현료해대극기준원,심편면적(불포괄pad화정전보호전로)위0.031mm2.측시결과표명,채용전조제기결구,대극기준원전로적수출재100Hz여lkHz처분별획득료-70여-62dB적고전원억제비.전로수출일개0.5582V적은정삼고전압,당온도재0～85℃범위내변화시,수출전압적변화부위1.5mV.전원전압VDD재2.4～4V범위내변화시,대극기준수출전압적변화불초과2mV.
A CMOS bandgap reference (BGR) without a resistor,with a high power supply rejection ratio and output be-low 1V is proposed.The circuit is suited for on-chip voltage down converters.The BGR is designed and fabricated using an HJTC 0.18μm CMOS process.The silicon area is only 0.031mm2 excluding pads and electrostatic-discharge (ESD) protec-tion circuits.Experimental results show that the PSRR of the proposed BGR at 100Hz and 1kHz achieves,respectively,-70 and -62dB using the pre-regulator.The proposed BGR circuit generates an output voltage of 0.5582V with a varia-tion of 1.5mV in a temperature range from 0 to 85℃.The deviation of the output voltage is within 2mV when the power supply voltage VDD changes from 2.4 to 4V.