CAJ | 학술논문

针对视频编码中存在的各种不同的亚像素插值方法,提出了一种支持多种标准的可配置插值结构.该结构采用2个独立的8阶插值滤波器,每个滤波器配置一个独立参数寄存器,可灵活配置任意1/4像素位置的滤波系数,从而实现对各种亚像素插值方法的支持.2个滤波器采用两步法策略进行插值,可以减少约46%的计算量.采用SMIC 0.13μm CMOS标准单元工艺对该结构进行综合,其工作频率可以达到 400MHz,面积约为32.6k门.实验结果显示,该滤波结构工作在250MHz时,可满足1920×1080、30fps的高清视频应用的实时插值计算.
침대시빈편마중존재적각충불동적아상소삽치방법,제출료일충지지다충표준적가배치삽치결구.해결구채용2개독립적8계삽치려파기,매개려파기배치일개독립삼수기존기,가령활배치임의1/4상소위치적려파계수,종이실현대각충아상소삽치방법적지지.2개려파기채용량보법책략진행삽치,가이감소약46%적계산량.채용SMIC 0.13μm CMOS표준단원공예대해결구진행종합,기공작빈솔가이체도 400MHz,면적약위32.6k문.실험결과현시,해려파결구공작재250MHz시,가만족1920×1080、30fps적고청시빈응용적실시삽치계산.
Various sub-pixel interpolation technologies are adopted in video coding applications. A multi-standard configuration interpolation architecture is proposed. It consists of two independent 8-tap filters. It can also reduce about 46% interpolation computation by a two-step filter method. Each filter includes a filter parameter register, which stores different filter parameter for various video standards. As a pipeline architecture, filter can have three filter results in one cycle. In SMIC 0.13μm CMOS process, the frequency of this architecture is up to 400MHz, and the area is about 32.6k gates. The experiment results show that, working on 250MHz, this architecture can satisfy the interpolation computation requirements of encoding 1920×1080,30fps HD video sequences.