CAJ | 학술논문

介绍了一种用于高品质射频集成电感的厚膜多孔硅背向生长技术.ASITIC模拟证明厚膜多孔硅衬底能够显著提高射频集成电感的性能.采用背向生长技术成功地制备出了厚膜多孔硅包括穿透整个硅片的多孔硅,并证实了该技术作为后处理工艺应用于CMOS技术的可行性.ESEM对所制样品的表面和截面形貌进行了分析.通过多组实验,得出了多孔硅生长速度与腐蚀电流密度的准线性关系.
개소료일충용우고품질사빈집성전감적후막다공규배향생장기술.ASITIC모의증명후막다공규츤저능구현저제고사빈집성전감적성능.채용배향생장기술성공지제비출료후막다공규포괄천투정개규편적다공규,병증실료해기술작위후처리공예응용우CMOS기술적가행성.ESEM대소제양품적표면화절면형모진행료분석.통과다조실험,득출료다공규생장속도여부식전류밀도적준선성관계.
A backside growth technique of thick porous silicon layers for the on-chip RF integrated inductor is presented.ASITIC calculation confirms that the thick porous silicon substrate (through the wafer) is a better choice to achieve high quality factor RF integrated inductors. Fabrication and characterization of the through wafer PS layer with the backside growth technique were carried out, which proved the feasibility of post-processing procedure in CMOS technology. ESEM was used to observe the morphologies of the fabricated samples. The relationships of PS growth rate as a function of current density was concluded.