CAJ | 학술논문

本文提出一种沟道长度为0.125 μm的异质结CMOS(HCMOS)器件结构.在该结构中,压应变的SiGe与张应变的Si分别作为异质结PMOS(HPMOS)与异质结NMOS(HNMOS)的沟道材料,且HPMOS与HNMOS为垂直层叠结构;为了精确地模拟该器件的电学特性,修正了应变SiGe与应变Si的空穴与电子的迁移率模型;利用Medici软件对该器件的直流与交流特性,以及输入输出特性进行了模拟与分析.模拟结果表明,相对于体Si CMOS器件,该器件具有更好的电学特性,正确的逻辑功能,且具有更短的延迟时间,同时,采用垂直层叠的结构此类器件还可节省约50%的版图面积,有利于电路的进一步集成.
본문제출일충구도장도위0.125 μm적이질결CMOS(HCMOS)기건결구.재해결구중,압응변적SiGe여장응변적Si분별작위이질결PMOS(HPMOS)여이질결NMOS(HNMOS)적구도재료,차HPMOS여HNMOS위수직층첩결구;위료정학지모의해기건적전학특성,수정료응변SiGe여응변Si적공혈여전자적천이솔모형;이용Medici연건대해기건적직류여교류특성,이급수입수출특성진행료모의여분석.모의결과표명,상대우체Si CMOS기건,해기건구유경호적전학특성,정학적라집공능,차구유경단적연지시간,동시,채용수직층첩적결구차류기건환가절성약50%적판도면적,유리우전로적진일보집성.
An integration of 0.125 μm dual-strained SiGe/Si heterojunction CMOSFET (HCMOSFET) structure is presented in this paper. Compressive strained SiGe and tensile strained Si are used as channel material for heterojunction PMOSFET (HPMOS) and heterojunction NMOSFET (HNMOS) respectively,HPMOS and HNMOS are vertically stacked in this structure; the parameters of mobility models of electrons and holes in strained SiGe and strained Si are modified for exact simulation; DC and AC electrical characteristics of this device and its input-output characteristics are finally simulated and analyzed by simulator Medici.The simulation results indicate that this device exhibits significant enhancements in these electrical characteristics, correct logic function and shorter delay time than bulk Si CMOS. Simultaneously, almost 50% layout area in packing density can be saved in comparison with that of bulk Si CMOS.