计算机工程与科学
計算機工程與科學
계산궤공정여과학
COMPUTER ENGINEERING & SCIENCE
2009年
11期
13-16
,共1页
JPEG2000%算术编码器%流水线结构%FPGA
JPEG2000%算術編碼器%流水線結構%FPGA
JPEG2000%산술편마기%류수선결구%FPGA
JPEG2000%arithmetic encoder%pipeline architecture%FPGA
各种并行位平面编码算法极大提高了上下文/符号数据对的产生速度,与此同时,算术编码算法的串行本质却严重限制了这些数据对的编码速度.因此,算术编码器(AE)已经成为JPEG2000系统的瓶颈问题.本文分析了现存各种算术编码器结构的缺陷,并提出了一种优化的单输入三级流水线结构.FPGA实现结果表明,本文结构以最小的硬件代价(1100 ALUTs和365 registers)获得了最优的实际数据吞吐率((133N)/(N + 2)).
各種併行位平麵編碼算法極大提高瞭上下文/符號數據對的產生速度,與此同時,算術編碼算法的串行本質卻嚴重限製瞭這些數據對的編碼速度.因此,算術編碼器(AE)已經成為JPEG2000繫統的瓶頸問題.本文分析瞭現存各種算術編碼器結構的缺陷,併提齣瞭一種優化的單輸入三級流水線結構.FPGA實現結果錶明,本文結構以最小的硬件代價(1100 ALUTs和365 registers)穫得瞭最優的實際數據吞吐率((133N)/(N + 2)).
각충병행위평면편마산법겁대제고료상하문/부호수거대적산생속도,여차동시,산술편마산법적천행본질각엄중한제료저사수거대적편마속도.인차,산술편마기(AE)이경성위JPEG2000계통적병경문제.본문분석료현존각충산술편마기결구적결함,병제출료일충우화적단수입삼급류수선결구.FPGA실현결과표명,본문결구이최소적경건대개(1100 ALUTs화365 registers)획득료최우적실제수거탄토솔((133N)/(N + 2)).
Many parallel schemes for bit-plane coding of JPEG2000 have been proposed to speed up the generation of the CX/D pairs, while the serial inherence of arithmetic coding limits the speed of coding these pairs greatly. Therefore the a-rithmetic encoder (AE) is the actual bottleneck of the JPEG2000 system. In this paper, an optimized single-symbol 3-stage pipeline architecture for AE is presented, which makes up the flaws of the existing ones. Results from the FPGA-based im-plementations show that our proposal has the best actual throughput ((133N)/(N + 2)) with the least hardware resources (1100 ALUTs and 365 registers).
