CAJ | 학술논문

采用0.35μm CMOS工艺设计2.5 Gbit/s速率光纤通信用收发全集成电路.发射部分包括复接和激光驱动电路, 完成4路622 Mbit/s随机信号输入、1路2.5 Gbit/s驱动信号输出的功能; 接收部分完成1路2.5 Gbit/s微弱随机信号输入、 4路622 Mbit/s分接输出功能.主要电路包括前置放大、限幅放大、时钟恢复、数据判决和1: 4分接. 测试结果显示, 2.5 Gbit/s光纤通信用发射芯片逻辑功能正确, 激光驱动器输出数据眼图10%～90%上升、下降沿时间分别为211.1 ps和200 ps; 2.5 Gbit/s光纤通信用接收芯片接收灵敏度优于20 mV, 恢复出的数据和时钟分别经过1: 4数据分接和1: 4时钟分频后, 相位抖动的均方根值分别为15.6 ps和1.9 ps. 两芯片均适用于2.5 Gbit/s速率光纤通信系统.
채용0.35μm CMOS공예설계2.5 Gbit/s속솔광섬통신용수발전집성전로.발사부분포괄복접화격광구동전로, 완성4로622 Mbit/s수궤신호수입、1로2.5 Gbit/s구동신호수출적공능; 접수부분완성1로2.5 Gbit/s미약수궤신호수입、 4로622 Mbit/s분접수출공능.주요전로포괄전치방대、한폭방대、시종회복、수거판결화1: 4분접. 측시결과현시, 2.5 Gbit/s광섬통신용발사심편라집공능정학, 격광구동기수출수거안도10%～90%상승、하강연시간분별위211.1 ps화200 ps; 2.5 Gbit/s광섬통신용접수심편접수령민도우우20 mV, 회복출적수거화시종분별경과1: 4수거분접화1: 4시종분빈후, 상위두동적균방근치분별위15.6 ps화1.9 ps. 량심편균괄용우2.5 Gbit/s속솔광섬통신계통.
2.5 Gbit/s monolithic integrated circuits (ICs) for optical fiber transmitter and receiver in 0.35 μm CMOS (complementary metal-oxide-semiconductor transistor) process are presented. The transmitter, which includes a 4: 1 multiplexer and a laser diode driver (LDD), has four 622 Mbit/s random signals as its inputs and gets a 2.5 Gbit/s driving signal as its output; the receiver detects a 2.5 Gbit/s random signal and gets four 622 Mbit/s signals at the output. The main circuits include a trans-impedance amplifier (TIA), a limiting amplifier, a clock and data recovery (CDR) unit, and a 1: 4 demultiplexer (DEMUX). Test results prove the logic functions of the transmitter to be right, and the 10% to 90% rise and fall times of transmitter's output data eye diagram are 211.1 ps and 200 ps, respectively. The sensitivity of the receiver is measured to be better than 20 mV. The root mean square jitter of the DEMUX's output data is 15.6 ps and that of the clock after 1: 4 frequency dividing is 1.9 ps. Two chips are both applicable to 2.5 Gbit/s optical fiber communication systems.