半导体学报
半導體學報
반도체학보
CHINESE JOURNAL OF SEMICONDUCTORS
2004年
9期
1061-1065
,共5页
李俊峰%杨荣%赵玉印%柴淑敏%刘明%徐秋霞%钱鹤
李俊峰%楊榮%趙玉印%柴淑敏%劉明%徐鞦霞%錢鶴
리준봉%양영%조옥인%시숙민%류명%서추하%전학
结构%工艺%仿真%实验%射频%SOI
結構%工藝%倣真%實驗%射頻%SOI
결구%공예%방진%실험%사빈%SOI
structure%process%simulation%experiment%silicon on insulator%radio frequency
结合多项用于深亚微米集成电路的新技术,提出了用于数GHz射频集成电路的SOI nMOSFET器件结构和制造工艺.经过半导体工艺模拟软件Tsuprem4仿真和优化,给出了主要的工艺步骤和详细的工艺条件.制作了0.25μm SOI射频nMOSFET器件,结构和工艺参数同仿真结果一致,测试获得了优良的或可接受的直流及射频性能.
結閤多項用于深亞微米集成電路的新技術,提齣瞭用于數GHz射頻集成電路的SOI nMOSFET器件結構和製造工藝.經過半導體工藝模擬軟件Tsuprem4倣真和優化,給齣瞭主要的工藝步驟和詳細的工藝條件.製作瞭0.25μm SOI射頻nMOSFET器件,結構和工藝參數同倣真結果一緻,測試穫得瞭優良的或可接受的直流及射頻性能.
결합다항용우심아미미집성전로적신기술,제출료용우수GHz사빈집성전로적SOI nMOSFET기건결구화제조공예.경과반도체공예모의연건Tsuprem4방진화우화,급출료주요적공예보취화상세적공예조건.제작료0.25μm SOI사빈nMOSFET기건,결구화공예삼수동방진결과일치,측시획득료우량적혹가접수적직류급사빈성능.
Device structure and fabrication process of SOI nMOSFET depleted partially are proposed for multi-gigahertz RF applications.Many advanced techniques for deep submiron MOSFETs are incorporated into the proposed device.Main steps and conditions in process are given in details,with simulation and optimization by using the process simulator,Tsuprem4.Experiment results of 0.25μm SOI RF nMOSFET are in consistence with simulated ones,and excellent or acceptable parameters of device performance are obtained for multi-gigahertz RF applications.
