CAJ | 학술논문

设计一种高精度轨对轨CMOS峰值检测电路.基于信号"先缩小后放大",在MOS采样开关管控制下电源对存储电容充电,该电路实现了轨对轨峰值检测,降低了检测电路的工作电流,提高了MOS开关管的速度和峰值检测的精度.该电路设计基于CSMC 0.5 μm CMOS工艺,采用了5 V单电源,检测精度小于1 mV ,检测电压范围为0～5 V ,整个检测电路的静态电流消耗为2 mA,正常工作频率为0.1 Hz～10 KHz.
설계일충고정도궤대궤CMOS봉치검측전로.기우신호"선축소후방대",재MOS채양개관관공제하전원대존저전용충전,해전로실현료궤대궤봉치검측,강저료검측전로적공작전류,제고료MOS개관관적속도화봉치검측적정도.해전로설계기우CSMC 0.5 μm CMOS공예,채용료5 V단전원,검측정도소우1 mV ,검측전압범위위0～5 V ,정개검측전로적정태전류소모위2 mA,정상공작빈솔위0.1 Hz～10 KHz.
A high-precision rail-to-rail CMOS peak detector circuit is designed . Based on that the signal is zooming out and in,and that the power supply can charge the storage capacitance under the control by MOS sample switch,the circuit could achieve rail-to-rail peak detector,lower the working current of the detection circuit,and improve the velocity of MOS switch and the precision of peak detector . The circuit design is based upon CSMC 0.5 μm CMOS technology,using 5 V single power supply . The detection precision is less than 1 mV,the range of detection voltage is 0～5 V, the static current dissipation is 2 mA,and the normal working frequency is 0.1 Hz～10 KHz.