CAJ | 학술논문

对中低分辨率CMOS闪烁型模数转换器的四个主要模块的折中设计进行了研究.这些折中考虑包括基准电压的非理想因素、前置放大器的折中六边形思考、再生比较器的滞回作用、误差更正电路.在模块折中设计研究的基础上,CMOS闪烁型模数转换器可达到高性能和低功耗.根据这种设计考虑,采用TSMC 0.25 μm CMOS 单层多晶硅五层金属工艺实现了一个4 bit 65 MHz的高转换率的闪烁型模数转换器.
대중저분변솔CMOS섬삭형모수전환기적사개주요모괴적절중설계진행료연구.저사절중고필포괄기준전압적비이상인소、전치방대기적절중륙변형사고、재생비교기적체회작용、오차경정전로.재모괴절중설계연구적기출상,CMOS섬삭형모수전환기가체도고성능화저공모.근거저충설계고필,채용TSMC 0.25 μm CMOS 단층다정규오층금속공예실현료일개4 bit 65 MHz적고전환솔적섬삭형모수전환기.
Trade-off designs of four prime modules in Low-to-moderate resolution CMOS Flash ADC are investigated. Trade-off considerations include reference voltages nonidealities, preamplifier trade-off hexagon, regenerative comparator hysteresis and error correction. Based on the trade-off design of each module, the proposed CMOS Flash ADC gets extreme combination of high performances and low cost. According to design considerations, a 4 bit 65 MHz high slew rate Flash ADC is implemented using TSMC 0.25 μm CMOS single-poly five-metal process.