半导体学报
半導體學報
반도체학보
CHINESE JOURNAL OF SEMICONDUCTORS
2008年
8期
1457-1460
,共4页
黄清华%刘训春%郝明丽%张宗楠%杨浩
黃清華%劉訓春%郝明麗%張宗楠%楊浩
황청화%류훈춘%학명려%장종남%양호
微波单片集成电路%低噪声放大器%Ka波段%噪声系数%高增益
微波單片集成電路%低譟聲放大器%Ka波段%譟聲繫數%高增益
미파단편집성전로%저조성방대기%Ka파단%조성계수%고증익
MMIC%LNA%Ka broadband%NF%high gain
报道了一种基于商用0.15um赝配高电子迁移率晶体管工艺的单片低噪声放大器,工作频率范围为23~36GHz.它采用自偏置结构.对晶体管栅宽进行了优化设计减小栅极电阻,以得到低的噪声系数.采用吸收回路和加电阻电容网络的直流偏置结构提高电路稳定性,用多谐振点方法和负反馈技术扩展带宽.测试结果表明,其噪声系数低于2.0dB,在31GHz处,噪声系数仅为1.6dB.在整个工作频带范崮内,增益大于26dB,输入回波损耗大于11dB,输出回波损耗大于13dB.36GHz处的ldB压缩点输出功率为14dBm.芯片尺寸为2.4mm×1mm.
報道瞭一種基于商用0.15um贗配高電子遷移率晶體管工藝的單片低譟聲放大器,工作頻率範圍為23~36GHz.它採用自偏置結構.對晶體管柵寬進行瞭優化設計減小柵極電阻,以得到低的譟聲繫數.採用吸收迴路和加電阻電容網絡的直流偏置結構提高電路穩定性,用多諧振點方法和負反饋技術擴展帶寬.測試結果錶明,其譟聲繫數低于2.0dB,在31GHz處,譟聲繫數僅為1.6dB.在整箇工作頻帶範崮內,增益大于26dB,輸入迴波損耗大于11dB,輸齣迴波損耗大于13dB.36GHz處的ldB壓縮點輸齣功率為14dBm.芯片呎吋為2.4mm×1mm.
보도료일충기우상용0.15um안배고전자천이솔정체관공예적단편저조성방대기,공작빈솔범위위23~36GHz.타채용자편치결구.대정체관책관진행료우화설계감소책겁전조,이득도저적조성계수.채용흡수회로화가전조전용망락적직류편치결구제고전로은정성,용다해진점방법화부반궤기술확전대관.측시결과표명,기조성계수저우2.0dB,재31GHz처,조성계수부위1.6dB.재정개공작빈대범고내,증익대우26dB,수입회파손모대우11dB,수출회파손모대우13dB.36GHz처적ldB압축점수출공솔위14dBm.심편척촌위2.4mm×1mm.
A four-stage monolithic microwave integrated circuits(MMIC)low noise amplifier(LNA)operating from 23 to 36GHz is reported using commercially available 0.15um PHEMT technology.The LNA is self-biased.To achieve a low noise characteristic,careful optimizations of gate width are performed to reduce gate resistance.Absorption circuits and an elaborate bias structure with a resistor-capacitor network are employed to improve stability.Multiple resonance points and negative feedback technologies are used to widen the bandwidth.Measurements show a noise figure(NF)of less than 2.OdB,and the lowest NF is only 1.6dB at a frequency of 31GHz.In the whole operation band,the LNA has a gain of higher than 26dB,and an input return loss and output return loss of more than 1 1 and 13dB,respectively.The output power at ldB compression gain of 36GHz is about 14dBm.The chip area is 2.4mm×1mm.