CAJ | 학술논문

本文分析了一种静态随机存储器单比特位失效的机理.通过纳米探针测量,发现该比特位写操作失败是由负责存取的N型晶体管的驱动力较弱导致.TEM分析显示该晶体管的多晶硅栅中晶粒尺寸较大,这有可能导致栅的功函数变化以及靠近栅介质层区域的掺杂较轻.我们用SPICE模拟证实了晶体管驱动力变弱的原因是局域的多晶栅耗尽.
본문분석료일충정태수궤존저기단비특위실효적궤리.통과납미탐침측량,발현해비특위사조작실패시유부책존취적N형정체관적구동력교약도치.TEM분석현시해정체관적다정규책중정립척촌교대,저유가능도치책적공함수변화이급고근책개질층구역적참잡교경.아문용SPICE모의증실료정체관구동력변약적원인시국역적다정책모진.
A SRAM single bit failure at write mode was carefully analyzed. By nano -probing the failed bit, it was found that a weak access - NMOS disabled the write - operation of that particular bit. A TEM check showed that the failed bit has large poly grain size as compared to a normal bit, which causes the gate work function to change and lower the local arsenic concentration. It is then verified by SPICE simu-lation that the local poly depletion is the origin of the access - NMOS conductibility degradation.