复旦学报（自然科学版）
複旦學報（自然科學版）
복단학보（자연과학판）
JOURNAL OF FUDAN UNIVERSITY(NATURAL SCIENCE)
2006年
1期
87-91
,共5页
毛静文%陈廷乾%陈诚%任俊彦%杨励
毛靜文%陳廷乾%陳誠%任俊彥%楊勵
모정문%진정건%진성%임준언%양려
模拟集成电路%带隙基准源%电源抑制比%低电压
模擬集成電路%帶隙基準源%電源抑製比%低電壓
모의집성전로%대극기준원%전원억제비%저전압
analog integrated circuits%bandgap voltage reference%PSRR%low voltage
设计了一个低电源电压的高精密的CMOS带隙电压基准源,采用SMIC 0.18μm CMOS工艺.实现了一阶温度补偿,具有良好的电源抑制比.测试结果表明,在1.5 V电源电压下,电源抑制比为47 dB,在0～80℃的温度范围内,输出电压变化率为0.269%,功耗为0.22 mW,芯片核面积为0.057 mm2.
設計瞭一箇低電源電壓的高精密的CMOS帶隙電壓基準源,採用SMIC 0.18μm CMOS工藝.實現瞭一階溫度補償,具有良好的電源抑製比.測試結果錶明,在1.5 V電源電壓下,電源抑製比為47 dB,在0～80℃的溫度範圍內,輸齣電壓變化率為0.269%,功耗為0.22 mW,芯片覈麵積為0.057 mm2.
설계료일개저전원전압적고정밀적CMOS대극전압기준원,채용SMIC 0.18μm CMOS공예.실현료일계온도보상,구유량호적전원억제비.측시결과표명,재1.5 V전원전압하,전원억제비위47 dB,재0～80℃적온도범위내,수출전압변화솔위0.269%,공모위0.22 mW,심편핵면적위0.057 mm2.
A low power and high precision CMOS bandgap voltage reference circuit is presented. Prototype of the circuit is fabricated using the 0.18 μm CMOS process. It fulfills the first order PTAT (Proportion To Absolute Temperature) temperature curvature compensation with a good PSRR (Power Supply Rejection Ratio). The measured results of this circuit at 1.5 V show that the PSRR is 47 dB. And the output voltage varies from 1. 114-1. 117 V which is constant within 0. 269 % over the temperature range of 0 - 80 ℃. The power dissipation is 0.22 mW and the active area is 0. 057 mm2.
