CAJ | 학술논문

通过理论分析与计算机模拟,给出了以提高跨导为目标的Si/SiGe PMOSFET优化设计方法,包括栅材料的选择、沟道层中Ge组分及其分布曲线的确定、栅氧化层及Si盖帽层厚度的优化和阈值电压的调节,基于此已研制出Si/SiGe PMOSFET器件样品.测试结果表明,当沟道长度为2μm时,Si/SiGe PMOS器件的跨导为45mS/mm(300K)和92mS/mm(77K),而相同结构的全硅器件跨导则为33mS/mm(300K)和39mS/mm(77K).
통과이론분석여계산궤모의,급출료이제고과도위목표적Si/SiGe PMOSFET우화설계방법,포괄책재료적선택、구도층중Ge조분급기분포곡선적학정、책양화층급Si개모층후도적우화화역치전압적조절,기우차이연제출Si/SiGe PMOSFET기건양품.측시결과표명,당구도장도위2μm시,Si/SiGe PMOS기건적과도위45mS/mm(300K)화92mS/mm(77K),이상동결구적전규기건과도칙위33mS/mm(300K)화39mS/mm(77K).
Through the theoretical analysis and computer simulation, the optimized design principles for Si/SiGe PMOSFETs are given,including the choice of gate materials,the determination of Ge percentage and the profile in SiGe channel,the thickness optimization of dioxide and silicon cap layer,and the adjustment of threshold voltage. In light of them, a SiGe PMOSFET is designed and fabricated successfully. The measurements indicate that the transconductance is 45mS/mm (300K) and 92mS/mm (77K) for SiGe PMOSFET's (L= 2μm),while it is 33mS/mm (300K) and 39mS/mm (77K) for Si PMOSFET.