光学精密工程
光學精密工程
광학정밀공정
OPTICS AND PRECISION ENGINEERING
2010年
1期
273-280
,共8页
面阵CCD%图像采集%现场可编程门阵列%相关双采样%彩色插值
麵陣CCD%圖像採集%現場可編程門陣列%相關雙採樣%綵色插值
면진CCD%도상채집%현장가편정문진렬%상관쌍채양%채색삽치
area array CCD%video capturing%Field Programming Gate Array(FPGA)%Correlated Double Sampling (CDS)%demosaicing
为了实现用面阵CCD实时采集彩色视频图像,设计了一种彩色视频图像实时采集系统.在分析SONY面阵CCD器件ICX424AQ的结构参数和彩色视频图像采集原理的基础上,实现了CCD控制时序的产生和整个采集系统的时序控制逻辑.分析了CCD器件的主要噪声来源,采用相关双采样技术滤除了视频信号中的复位噪声和1/f等低频噪声,提高了系统的信噪比.由于采用的面阵CCD芯片表面覆盖有Bayer彩色滤波阵列(CFA),因此每个像素点只有一个颜色分量.为了获得全彩图像,采用一种改进的双线性插值算法来获得每个像素点上丢失的色度信息,较好地兼顾了插值效果和硬件实现复杂程度.该设计采用CCD逐行扫描工作方式,曝光时间为0.32 ms时,所有像素信号可依次读出.整个系统采用FPGA作为核心控制器件,读取的CCD信号经过插值处理,实时地通过发送芯片SiI1162以DVI格式发送到TFT-LCD屏上显示.
為瞭實現用麵陣CCD實時採集綵色視頻圖像,設計瞭一種綵色視頻圖像實時採集繫統.在分析SONY麵陣CCD器件ICX424AQ的結構參數和綵色視頻圖像採集原理的基礎上,實現瞭CCD控製時序的產生和整箇採集繫統的時序控製邏輯.分析瞭CCD器件的主要譟聲來源,採用相關雙採樣技術濾除瞭視頻信號中的複位譟聲和1/f等低頻譟聲,提高瞭繫統的信譟比.由于採用的麵陣CCD芯片錶麵覆蓋有Bayer綵色濾波陣列(CFA),因此每箇像素點隻有一箇顏色分量.為瞭穫得全綵圖像,採用一種改進的雙線性插值算法來穫得每箇像素點上丟失的色度信息,較好地兼顧瞭插值效果和硬件實現複雜程度.該設計採用CCD逐行掃描工作方式,曝光時間為0.32 ms時,所有像素信號可依次讀齣.整箇繫統採用FPGA作為覈心控製器件,讀取的CCD信號經過插值處理,實時地通過髮送芯片SiI1162以DVI格式髮送到TFT-LCD屏上顯示.
위료실현용면진CCD실시채집채색시빈도상,설계료일충채색시빈도상실시채집계통.재분석SONY면진CCD기건ICX424AQ적결구삼수화채색시빈도상채집원리적기출상,실현료CCD공제시서적산생화정개채집계통적시서공제라집.분석료CCD기건적주요조성래원,채용상관쌍채양기술려제료시빈신호중적복위조성화1/f등저빈조성,제고료계통적신조비.유우채용적면진CCD심편표면복개유Bayer채색려파진렬(CFA),인차매개상소점지유일개안색분량.위료획득전채도상,채용일충개진적쌍선성삽치산법래획득매개상소점상주실적색도신식,교호지겸고료삽치효과화경건실현복잡정도.해설계채용CCD축행소묘공작방식,폭광시간위0.32 ms시,소유상소신호가의차독출.정개계통채용FPGA작위핵심공제기건,독취적CCD신호경과삽치처리,실시지통과발송심편SiI1162이DVI격식발송도TFT-LCD병상현시.
A real-time color video capture system is established to realize the color video capturing by an area array CCD . The hardware and software designs of the color video capture system of area array CCD ICX424AQ presented by Sony company are analyzed, and the structure parameters of the area-array CCD and the color video gathering principle of the capature system are introduced. Then, the CCD control sequence and the timing logic of the whole capture system is realized. Furthermore,the noises of the video signal (KTC noise and 1/f noise) are filtered by using the Correlated Double Sampling (CDS) technique, and the signal-to-noise ratio of the system is enhanced. Because the area array CCD image sensor is covered by a Bayer Color Filter Array (CFA), each pixel has only one component of three primary colors. In order to obtain full chromaticity at every pixel, an enhanced bilinear algorithm is presented to obtain a compromise solution between the complex of hardware implementation and image quality through interpolating. The CCD is worked under progressive scan mode and all pixel signals can be read out simultaneously at the exposing time of 0.32 ms. The whole system is controlled by a Field Programming Gate Array(FPGA),and the pixel data readout is interpolated and then transmitted by the transmitting chip SiI1162. Finally, the designed video is displayed on a TFT-LCD in real time.