CAJ | 학술논문

提出了一个采用TSMC 0.18μmCMOS工艺设计的,工作频段为3.1～5.2 GHz的超宽带低噪声放大器.放大器采用了前置带通滤波器的并联负反馈共源共栅结构,并从宽带电路.高频电路器件选择等方面讨论了超宽带低噪声放大器的设计,结果表明,在整个工作频段,电路输入输出匹配S11S22均小于-14 dB,最高增益为15.92 dB,增益波动为1.13 dB,电路工作电压为1.8 V,功耗为27 mW,噪声系数NF为1.84～2.11 dB.
제출료일개채용TSMC 0.18μmCMOS공예설계적,공작빈단위3.1～5.2 GHz적초관대저조성방대기.방대기채용료전치대통려파기적병련부반궤공원공책결구,병종관대전로.고빈전로기건선택등방면토론료초관대저조성방대기적설계,결과표명,재정개공작빈단,전로수입수출필배S11S22균소우-14 dB,최고증익위15.92 dB,증익파동위1.13 dB,전로공작전압위1.8 V,공모위27 mW,조성계수NF위1.84～2.11 dB.
This paper presents a 3.1～5.2 GHz ultra-wideband low noise amplifier (LNA) with a band-pass filter in the front of shunt feedback cascode topology fabricated in TSMC 0.18 μm CMOS process. More efforts are made on the wideband circuit and the choice of device in the high frequency. Consuming 27 mW from a 1.8 V power supply, simulation results show that S11 and S22 of circuit are lower than -14 dB, peak gain is 1.13 dB, flatness of gain is 15.92 dB and the noise figure of the LNA is from 1.84 dB to 2.11 dB over a full working band.