前端电子学系统板的故障定位研究
전단전자학계통판적고장정위연구
The Study of Fault Location for Front-End Electronics System
  • 万方数据
    核电子学与探测技术 핵전자학여탐측기술
    NUCLEAR ELECTRONICS & DETECTION TECHNOLOGY
    2009年 4期 760-763,791 ,共5页

    张凡%王东%黄光明%周代翠

    장범%왕동%황광명%주대취

    前端电子学系统%故障定位%FPGA%配置机制 前耑電子學繫統%故障定位%FPGA%配置機製
    전단전자학계통%고장정위%FPGA%배치궤제
    Front-End Electronics%Fault Location%FPGA%Configuration Scheme
    因为最新研发的250块ALICE/PHOS前端电子学FEE系统板的部分器件在无铅焊接中被部分或完全损坏.为了不影响FEE系统性能,准确定位FFE系统板上与FPGA相关的故障,在对ACEX系列FPGA的配置机制进行深入研究的基础上找到了一种定位FEE系统板故障点的方法.文章着重研究了多器件的JTAG配置、基于EPC系列配置器件的PS配置和FPGA的自动重配置等问题.FEE系统板的大量测试和维修结果证明,该定位方法能准确、快速地定位FEE系统板上与FPGA器件相关的故障点.
    인위최신연발적250괴ALICE/PHOS전단전자학FEE계통판적부분기건재무연한접중피부분혹완전손배.위료불영향FEE계통성능,준학정위FFE계통판상여FPGA상관적고장,재대ACEX계렬FPGA적배치궤제진행심입연구적기출상조도료일충정위FEE계통판고장점적방법.문장착중연구료다기건적JTAG배치、기우EPC계렬배치기건적PS배치화FPGA적자동중배치등문제.FEE계통판적대량측시화유수결과증명,해정위방법능준학、쾌속지정위FEE계통판상여FPGA기건상관적고장점.
    Since some devices on the latest developed 250 ALICE/PHOS Front-end electronics(FEE) sys-tem cards had been partly or completely damaged during lead-free soldering. To alleviate the influence on the performance of FEE system and to locate fault related FPGA accurately, we should find a method for locating fault of FEE system based on the deep study of FPGA configuration scheme. It emphasized on the problems such as JTAG configuration of mult-deviees, PS configuration based on EPC series configu-ration devices and auto re-configuration of FPGA. The result of the massive FEE system cards testing and repairing show that that location method can accurately and quickly target the fault point related FP-GA on FEE system cards.
    원문보기 원문다운로드 사이트로이동
저자의 최근 논문