微电子学
微電子學
미전자학
MICROELECTRONICS
2009年
6期
733-737
,共5页
何伟%张润曦%徐萍%张勇%陈子晏%赖宗声
何偉%張潤晞%徐萍%張勇%陳子晏%賴宗聲
하위%장윤희%서평%장용%진자안%뢰종성
CMOS%超高频射频识别%频率综合器%相位噪声
CMOS%超高頻射頻識彆%頻率綜閤器%相位譟聲
CMOS%초고빈사빈식별%빈솔종합기%상위조성
CMOS%UHF RFID%Frequency synthesizer%Phase noise
结合EPC global C1 G2协议和ETSI规范要求,讨论了频率综合器噪声性能需求,并设计实现了用于单片CMOS UHF RFID阅读器中的低噪声三阶电荷泵锁相环频率综合器.在关键模块LC VCO的设计中,采用对称LC滤波器和LDO 调节器提高VCO相位噪声性能.电路采用IBM 0.18 μm CMOS RF工艺实现,测得频率综合器在中心频率频偏200 kHz和1 MHz处相位噪声分别为-109.13 dBc/Hz和-127.02 dBc/Hz.
結閤EPC global C1 G2協議和ETSI規範要求,討論瞭頻率綜閤器譟聲性能需求,併設計實現瞭用于單片CMOS UHF RFID閱讀器中的低譟聲三階電荷泵鎖相環頻率綜閤器.在關鍵模塊LC VCO的設計中,採用對稱LC濾波器和LDO 調節器提高VCO相位譟聲性能.電路採用IBM 0.18 μm CMOS RF工藝實現,測得頻率綜閤器在中心頻率頻偏200 kHz和1 MHz處相位譟聲分彆為-109.13 dBc/Hz和-127.02 dBc/Hz.
결합EPC global C1 G2협의화ETSI규범요구,토론료빈솔종합기조성성능수구,병설계실현료용우단편CMOS UHF RFID열독기중적저조성삼계전하빙쇄상배빈솔종합기.재관건모괴LC VCO적설계중,채용대칭LC려파기화LDO 조절기제고VCO상위조성성능.전로채용IBM 0.18 μm CMOS RF공예실현,측득빈솔종합기재중심빈솔빈편200 kHz화1 MHz처상위조성분별위-109.13 dBc/Hz화-127.02 dBc/Hz.
Requirements of frequency synthesizer on phase noise were discussed based on EPC global C1G2 and ETSI multi-protocol operation.A low phase noise 3rd-order II-type charge pump phase locked loop for single-chip CMOS UHF RFID reader was presented, which acted as a frequency synthesizer.Symmetrical LC filters and LDO regulator were used to improve phase noise performance.The circuit was implemented in 0.18 μm CMOS RF technology.Test results showed that the frequency synthesizer had a phase noise of -109.13 dBc/Hz and -127.02 dBc/Hz, at 200 kHz and 1 MHz offset from the carrier, respectively.
