CAJ | 학술논문

利用可重构技术可以显著改善系统的性能.重点分析探讨了支持可重构技术的适应性显式并行指令技术(AEPIC)的系统模型.该系统模型由一个显式并行指令技术(EPIC)处理器和一个精细且可动态重构结构紧密连接而成,其特点在于支持动态可重构和指令合成,因此可以为不同的应用程序提供不同的动态指令集.通过AEPIC模拟器和可重构硬件Xilinx FPGA进行模拟分析以验证其有效性.实验结果表明:比起显式并行指令技术,此系统模型能够以同样的运行频率得到更高的运行速度.
이용가중구기술가이현저개선계통적성능.중점분석탐토료지지가중구기술적괄응성현식병행지령기술(AEPIC)적계통모형.해계통모형유일개현식병행지령기술(EPIC)처리기화일개정세차가동태중구결구긴밀련접이성,기특점재우지지동태가중구화지령합성,인차가이위불동적응용정서제공불동적동태지령집.통과AEPIC모의기화가중구경건Xilinx FPGA진행모의분석이험증기유효성.실험결과표명:비기현식병행지령기술,차계통모형능구이동양적운행빈솔득도경고적운행속도.
Reconfigurable hardware offers the embedded systems the potential for significant performance improvements by providing support for application-specific operations. Adaptive Explicitly Parallel Instruction Computing is a prototype model such that fine-grain and dynamically reconfigurable structure is tightly coupled with a generic EPIC machine. AEPIC allows application programs to add specialized functional units yielding a dynamically varying instruction set interface to the running appliAEPIC's potential realistic experiments are conducted in an environment that incorporates the AEPIC simulator and actual reconfigurable hardware of Xilinx FPGA. Results show that AEPIC can achieve the similar or higher performance at a much lower execution frequency,compared with EPIC.