CAJ | 학술논문

提出一种可在宽电源电压范围下工作的带隙基准源设计.由于采用了一些新的结构,使得其电源抑制比和温度稳定性有明显提高.为支持电源管理芯片的休眠工作模式以降低待机功耗,电路中专门设置了一个辅助的微功耗基准,在正常模式下为电路提供偏置,在休眠模式中替代主基准以节省功耗.仿真结果表明,该基准源提供的1.27V基准电压在-20至120℃范围内的最大温漂为3.5mV.当供电电压由3V变化至40V时,基准电压的变化为56μV.在低于10kHz的频率范围内基准源具有大于100dB的电源抑制比.芯片采用1.5μm BCD(Bipolar-CMOS-DMOS)工艺设计与实现.实验结果证实上述设计目标已基本实现.
제출일충가재관전원전압범위하공작적대극기준원설계.유우채용료일사신적결구,사득기전원억제비화온도은정성유명현제고.위지지전원관리심편적휴면공작모식이강저대궤공모,전로중전문설치료일개보조적미공모기준,재정상모식하위전로제공편치,재휴면모식중체대주기준이절성공모.방진결과표명,해기준원제공적1.27V기준전압재-20지120℃범위내적최대온표위3.5mV.당공전전압유3V변화지40V시,기준전압적변화위56μV.재저우10kHz적빈솔범위내기준원구유대우100dB적전원억제비.심편채용1.5μm BCD(Bipolar-CMOS-DMOS)공예설계여실현.실험결과증실상술설계목표이기본실현.
An on-chip voltage reference with a wide supply voltage range is required by some applications,especially that of power management (PM) controller chips applied to telecommunication,automotive,lighting equipment,etc,when high power supply voltage is needed.Accordingly,a new bandgap reference with a wide supply voltage range is proposed.Due to the improved structure,it features a high power supply rejection ratio (PSRR) and high temperature stability.In addition,an auxiliary micro-power reference is introduced to support the sleep mode of the PM chip and reduce its standby power consumption.The auxiliary reference provides bias currents in normal mode and a 1.28V reference voltage in sleep mode to replace the main reference and save power.Simulation results show that the reference provides a reference volt-age of 1.27V,which has a 3.5mV drift over the temperature range from -20 to 120℃ and 56μV deviation over a supply voltage range from 3 to 40V.The PSRR is higher than 100dB for frequency below 10kHz.The circuit was completed in 1.5μm BCD (Bipolar-CMOS-DMOS) technology.The experimental results show that all main expectations are achieved.