CAJ | 학술논문

提出了一种新的纯MOS结构的基准电压源,它利用pMOS和nMOS的阈值电压差来抵消工艺偏差,提高了基准的精度.该电路经过Chartered 0.35mm标准CMOS工艺成功流片,芯片面积为0.022mm2.测试结果表明:输出平均电压在室温下与仿真结果的绝对误差为6mV,在0～100℃范围内温度系数为180ppm/℃,电源调整率为±1.1%.该基准应用于自适应功率管驱动器中.
제출료일충신적순MOS결구적기준전압원,타이용pMOS화nMOS적역치전압차래저소공예편차,제고료기준적정도.해전로경과Chartered 0.35mm표준CMOS공예성공류편,심편면적위0.022mm2.측시결과표명:수출평균전압재실온하여방진결과적절대오차위6mV,재0～100℃범위내온도계수위180ppm/℃,전원조정솔위±1.1%.해기준응용우자괄응공솔관구동기중.
A novel MOS-only voltage reference is presented, which is based on the threshold voltage difference between p-type and n-type MOSFETs. Its precision is improved by the cancellation of the process variation. The reference has been successfully implemented in a Chartered 0.35μm CMOS process. The occupied chip area is 0. 022mm2. Measurements indicate that without trimming, the average output voltage error is 6mV at room temperature compared with the simulation result. The temperature coefficient is 180ppm/℃ in the worst case in the temperature range of 0 to 100℃ ,and the line regulation is + 1.1%. The reference is applied in an adaptive power MOSFET driver.