CAJ | 학술논문

提出了一种适用于无源超高频射频识别标签的低电压低功耗射频/模拟前端电路.通过引入一个使用亚阈值技术的基准源,电路实现了温度补偿,从而使得系统时钟在～40～100℃的范围内保持稳定.在模块设计中,提出了一些新的电路结构来降低系统功耗,其中包括一种零静态功耗的上电复位电路和一种新的稳压电路.该射频/模拟前端电路采用不带肖特基二极管0.18μm CMOS EEP-ROM工艺流片实现,它与数字基带、EEPROM一起实现了一个完整的标签芯片.测试结果表明,该芯片的最低电源电压要求为0.75V.在该最低电压下,射频/模拟前端电路的总电流为4.6μA.
제출료일충괄용우무원초고빈사빈식별표첨적저전압저공모사빈/모의전단전로.통과인입일개사용아역치기술적기준원,전로실현료온도보상,종이사득계통시종재～40～100℃적범위내보지은정.재모괴설계중,제출료일사신적전로결구래강저계통공모,기중포괄일충령정태공모적상전복위전로화일충신적은압전로.해사빈/모의전단전로채용불대초특기이겁관0.18μm CMOS EEP-ROM공예류편실현,타여수자기대、EEPROM일기실현료일개완정적표첨심편.측시결과표명,해심편적최저전원전압요구위0.75V.재해최저전압하,사빈/모의전단전로적총전류위4.6μA.
This paper presents a low voltage, low power RF/analog front-end circuit for passive ultra high frequency (UHF) radio frequency identification (RFID) tags. Temperature compensation is achieved by a reference generator using sub-threshold techniques. The chip maintains a steady system dock in a temperature range from-40 to 100℃. Some novel building blocks are developed to save system power consumption,including a zero static current power-on reset circuit and a voltage regulator. The RF/analog front-end circuit is implemented with digital base-band and EEPROM to construct a whole tag chip in 0.18μm CMOS EEPROM technology without Schottcky diodes. Measured results show that the chip has a minimum supply voltage requirement of 0. 75V. At this voltage, the total current consumption of the RF/analog front-end circuit is 4.6μA.