CAJ | 학술논문

提出了一个应用于时频分析的短时傅里叶变换处理器.为了克服已有的离散短时傅里叶变换算法和结构的缺点,给出了一种基于快速傅里叶变换阵列的新结构.根据实际需要提出了一种新的高频域分辨率的SDF(Single-path Delay Feedback)结构FFT单元,和传统的SDF结构FFT单元相比,反馈FIFO的深度和蝶形单元的数量都有所降低.再加上开发窗函数的对称性和适当合并硬件资源,与原始设计相比处理器的功耗降低了20%.使用中芯国际0.18微米工艺实现之后,系统工作时钟可以达到200MHz,即该处理器可以满足同样频率的采样信号的实时时频分析需求.
제출료일개응용우시빈분석적단시부리협변환처리기.위료극복이유적리산단시부리협변환산법화결구적결점,급출료일충기우쾌속부리협변환진렬적신결구.근거실제수요제출료일충신적고빈역분변솔적SDF(Single-path Delay Feedback)결구FFT단원,화전통적SDF결구FFT단원상비,반궤FIFO적심도화접형단원적수량도유소강저.재가상개발창함수적대칭성화괄당합병경건자원,여원시설계상비처리기적공모강저료20%.사용중심국제0.18미미공예실현지후,계통공작시종가이체도200MHz,즉해처리기가이만족동양빈솔적채양신호적실시시빈분석수구.
A discrete short time Fourier transform (STFT) processor for time-frequency analysis is proposed in this paper. To overcome the drawbacks of previous discrete STFT algorithms and architectures, a new architecture based on fast Fourier transform (FFT) array is presented. An optimized single-path delay feedback (SDF) FFT architecture is proposed for high frequency resolution, which reduces feedback FIFO depth and butterfly units' number in comparison with the traditional one. Along with exploiting the symmetry of window function and performing hardware combination, power consumption decreased by 20%. The processor has been implemented with SMIC 0.18μm standard cell library, static timing analysis and dynamic simulation with timing back-annotated show that under worst-case conditions, 200MHz clock rate can be achieved, which means that the real-time time-frequency analysis demand can be fulfilled under the same sample frequency.