计算机工程与科学
計算機工程與科學
계산궤공정여과학
COMPUTER ENGINEERING & SCIENCE
2010年
2期
128-130,145
,共4页
LED%网络%NiosII%SOPC
LED%網絡%NiosII%SOPC
LED%망락%NiosII%SOPC
LED%network%NiosII%SOPC
本文提出了一种基于SOPC的LED网络控制器的设计方法.采用FPGA+SRAM+PHY/MAC的结构,构建了网络控制器硬件平台.采用软硬件协调设计理念,通过添加NiosII自定义外设IP软核、利用FPGA和外部SRAM构建大容量FIFO以及优化网卡驱动程序,实现TOE和RDMA功能,从而提高网络控制器的带宽、保证LED屏画面流畅.系统测试表明,控制器性能稳定,NiosII工作在50MHz时,网络控制器接收UDP数据的带宽为60Mbps.
本文提齣瞭一種基于SOPC的LED網絡控製器的設計方法.採用FPGA+SRAM+PHY/MAC的結構,構建瞭網絡控製器硬件平檯.採用軟硬件協調設計理唸,通過添加NiosII自定義外設IP軟覈、利用FPGA和外部SRAM構建大容量FIFO以及優化網卡驅動程序,實現TOE和RDMA功能,從而提高網絡控製器的帶寬、保證LED屏畫麵流暢.繫統測試錶明,控製器性能穩定,NiosII工作在50MHz時,網絡控製器接收UDP數據的帶寬為60Mbps.
본문제출료일충기우SOPC적LED망락공제기적설계방법.채용FPGA+SRAM+PHY/MAC적결구,구건료망락공제기경건평태.채용연경건협조설계이념,통과첨가NiosII자정의외설IP연핵、이용FPGA화외부SRAM구건대용량FIFO이급우화망잡구동정서,실현TOE화RDMA공능,종이제고망락공제기적대관、보증LED병화면류창.계통측시표명,공제기성능은정,NiosII공작재50MHz시,망락공제기접수UDP수거적대관위60Mbps.
This paper presents a design method of the LED network controller based on SOPC. Using a FPGA+SRAM+PHY/MAC structure,we build the network controller hardware platform.Using the concept of software and hardware coordinated design,we define the peripheral IP soft core through adding NiosII,and we construct a large capacity FIFO using FPGA and exterior SRAM as well as optimizing the network card driver,hence realizing TOE and the RDMA function and enhancing the network controller's band width as well as guaranteeing that the LED screen picture is smooth.System tests show that the controller works steadily;NiosII works in the frequence of 50 MHz, and the bandwidth of the network controller's receiving UDP data is 60 Mbps.
