基于FPGA的空间矢量脉冲宽度调制发生器设计
기우FPGA적공간시량맥충관도조제발생기설계
Design of SVPWM generator based on FPGA
  • 万方数据
    电力自动化设备 전력자동화설비
    ELECTRIC POWER AUTOMATION EQUIPMENT
    2012年 2期 56-61 ,共6页

    王奔%仇乐兵%徐万良%李慧

    왕분%구악병%서만량%리혜

    SVPWM%FPGA%DSP Builder%脉宽调制%仿真%HIL SVPWM%FPGA%DSP Builder%脈寬調製%倣真%HIL
    SVPWM%FPGA%DSP Builder%맥관조제%방진%HIL
    SVPWM%Field Programmable Gate Arrays(FPGA)%DSP Builder%pulse width modulation%computer simulation%HIL
    采用自顶向下的设计方法,设计出一种新的基于FPGA的空间矢量脉宽调制发生器.通过设置逻辑判断子模块,调制发生器能有效地处理过调制.通过利用宏功能,空间矢量脉宽调制发生器的一些子模块能完成更为有效的逻辑综合与器件实现.该脉宽调制发生器的实现结构紧凑,时序逻辑简单,能方便地设置开关频率,且能灵活调整死区时间,以适用于不同的应用场合.基于MATLAB/SimPowerSystems与Altera DSPBuilder的集成开发环境,设计出一个FPGA实验平台(硬件环仿真平台),并通过硬件环仿真对所设计的空间矢量脉宽调制发生器进行验证.实验结果表明了设计策略的有效性.
    채용자정향하적설계방법,설계출일충신적기우FPGA적공간시량맥관조제발생기.통과설치라집판단자모괴,조제발생기능유효지처리과조제.통과이용굉공능,공간시량맥관조제발생기적일사자모괴능완성경위유효적라집종합여기건실현.해맥관조제발생기적실현결구긴주,시서라집간단,능방편지설치개관빈솔,차능령활조정사구시간,이괄용우불동적응용장합.기우MATLAB/SimPowerSystems여Altera DSPBuilder적집성개발배경,설계출일개FPGA실험평태(경건배방진평태),병통과경건배방진대소설계적공간시량맥관조제발생기진행험증.실험결과표명료설계책략적유효성.
    An FPGA-based SVPWM generator is designed with the top-down design methodology,which deals with the over modulation effectively by the logic judgment module and implements the efficient logic synthesis conveniently in its submodules by the macro functions.Its structure is compact,its timing logic is simple,and its switching-frequency and dead-time can be easily set for different applications.An FPGA experimental platform is designed based on the integrated development environment of MATLAB/SimPowerSystems and Altera DSP Builder,by which the effectiveness of the designed SVPWM generator is verified through the HIL(Hardware In the Loop) simulation.
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