东南大学学报(英文版)
東南大學學報(英文版)
동남대학학보(영문판)
JOURNAL OF SOUTHEAST UNIVERSITY
2011年
3期
266-269
,共4页
开关电容电路%sigma-delta调制器%高分辨率%非理想特性%低功耗
開關電容電路%sigma-delta調製器%高分辨率%非理想特性%低功耗
개관전용전로%sigma-delta조제기%고분변솔%비이상특성%저공모
switched-capacitor (SC) circuit%sigma-delta modulator (SDM)%high resolution%non-ideality%low power
针对微弱重力信号测量中加速度计的数字输出接口电路应具有高分辨率的问题,引入了开关电容(SC)sigma-delta调制器(SDM).基于SDM的工作原理和拓扑结构,分析了过采样比、内部量化器位数以及级联结构对提高微弱信号检测精度的影响,设计了满足加速度计接口电路高分辨率要求的理想二阶1位低失真SDM结构.通过研究各模块在SC电路实现中的非理想特性及其对电路功耗的影响,设计了基于不同带宽的低功耗SDM实现参数,给出了相应的功耗估计.利用Simulink对各设计方案进行了时域的行为级仿真.结果表明,所设计SDM在低功耗的前提下其分辨率可达21位以上,其电路实现参数可用于指导晶体管级电路设计.
針對微弱重力信號測量中加速度計的數字輸齣接口電路應具有高分辨率的問題,引入瞭開關電容(SC)sigma-delta調製器(SDM).基于SDM的工作原理和拓撲結構,分析瞭過採樣比、內部量化器位數以及級聯結構對提高微弱信號檢測精度的影響,設計瞭滿足加速度計接口電路高分辨率要求的理想二階1位低失真SDM結構.通過研究各模塊在SC電路實現中的非理想特性及其對電路功耗的影響,設計瞭基于不同帶寬的低功耗SDM實現參數,給齣瞭相應的功耗估計.利用Simulink對各設計方案進行瞭時域的行為級倣真.結果錶明,所設計SDM在低功耗的前提下其分辨率可達21位以上,其電路實現參數可用于指導晶體管級電路設計.
침대미약중력신호측량중가속도계적수자수출접구전로응구유고분변솔적문제,인입료개관전용(SC)sigma-delta조제기(SDM).기우SDM적공작원리화탁복결구,분석료과채양비、내부양화기위수이급급련결구대제고미약신호검측정도적영향,설계료만족가속도계접구전로고분변솔요구적이상이계1위저실진SDM결구.통과연구각모괴재SC전로실현중적비이상특성급기대전로공모적영향,설계료기우불동대관적저공모SDM실현삼수,급출료상응적공모고계.이용Simulink대각설계방안진행료시역적행위급방진.결과표명,소설계SDM재저공모적전제하기분변솔가체21위이상,기전로실현삼수가용우지도정체관급전로설계.
For the high resolution required in a digital interface circuit of an accelerometer used in feeble gravity measurement,a switched-capacitor (SC) sigma-delta modulator (SDM) is proposed.Based on the principle and the topology structure of the SDMs,the influence of oversampling ratio,bits of an internal quantizer and the cascaded structure on weak signal detecting precision is analyzed,and an ideal low-distortion SDM with a second-order 1-bit structure satisfying the highresolution interface circuit of an accelerometer is designed.With the research on non-idealities of each SDM block in the SC circuit implementation and their impacts on power consumption,the realized parameters of low-power SDMs based on different bandwidths are devised and the power consumption of each SDM is estimated.Time-domain behavioral simulation is explored based on Simulink.The results demonstrate that a 21-bit resolution of the designed SDMs can be achieved on the premise of low power,and the parameters for the circuit implementation can be directed to the transistor-level circuit design.