电子技术应用
電子技術應用
전자기술응용
APPLICATION OF ELECTRONIC TECHNIQUE
2010年
3期
60-62,66
,共4页
孙杰%龚敏%陈昶%邬齐荣
孫傑%龔敏%陳昶%鄔齊榮
손걸%공민%진창%오제영
双积分A/D转换器%单电源供电%低功耗
雙積分A/D轉換器%單電源供電%低功耗
쌍적분A/D전환기%단전원공전%저공모
double-integral A/D converter%individual power supply%low power consumption
设计了一种改进的双积分A/D转换器,通过采取2种模式积分的方法实现了+5 V单电源供电,克服了传统双积分A/D转换器需要双电源的弊端.重点考虑可处理输入信号范围以及功耗的优化,并使用栅压自举开关保证了A/D转换的精度.整体电路设计基于CSMC 0.5μm 2P3M CMOS工艺,使用Cadence Spectre进行仿真,在5 V供电情况下达到10 bit精度,转换速率>10 Kb/s,输入电压范围达到0~5 V,INL<1/2 LSB,系统功耗2.636 mW.
設計瞭一種改進的雙積分A/D轉換器,通過採取2種模式積分的方法實現瞭+5 V單電源供電,剋服瞭傳統雙積分A/D轉換器需要雙電源的弊耑.重點攷慮可處理輸入信號範圍以及功耗的優化,併使用柵壓自舉開關保證瞭A/D轉換的精度.整體電路設計基于CSMC 0.5μm 2P3M CMOS工藝,使用Cadence Spectre進行倣真,在5 V供電情況下達到10 bit精度,轉換速率>10 Kb/s,輸入電壓範圍達到0~5 V,INL<1/2 LSB,繫統功耗2.636 mW.
설계료일충개진적쌍적분A/D전환기,통과채취2충모식적분적방법실현료+5 V단전원공전,극복료전통쌍적분A/D전환기수요쌍전원적폐단.중점고필가처리수입신호범위이급공모적우화,병사용책압자거개관보증료A/D전환적정도.정체전로설계기우CSMC 0.5μm 2P3M CMOS공예,사용Cadence Spectre진행방진,재5 V공전정황하체도10 bit정도,전환속솔>10 Kb/s,수입전압범위체도0~5 V,INL<1/2 LSB,계통공모2.636 mW.
An improved double-integral A/D converter was designed. By using two modes of integration, a +5 V individual power supply was realized to overcome the traditional ADC's shortcoming that need double power. Foucusing on input signal range and power consumption optimization, while a gate voltage bootstrapped switch uhilized to ensures the ADC's precision. Design based on CSMC 0.5 μm 2P3M CMOS process. Simulating with Cadence Spectre shows 10 bit accuracy, conversion rate >10 Kb/s, input voltage range 0~5 V, INL <1/2 LSB, system power dissipation 2.636 mW was achieved in the case of 5 V supply.