电路与系统学报
電路與繫統學報
전로여계통학보
JOURNAL OF CIRCUITS AND SYSTEMS
2009年
5期
112-116
,共5页
周端%朱樟明%杨银堂%史明华%梁政
週耑%硃樟明%楊銀堂%史明華%樑政
주단%주장명%양은당%사명화%량정
全局异步局部同步%异步封装%信号转换%标准逻辑单元%FPGA
全跼異步跼部同步%異步封裝%信號轉換%標準邏輯單元%FPGA
전국이보국부동보%이보봉장%신호전환%표준라집단원%FPGA
globally asynchronous locally synchronous%asynchronous wrapper%signal transition%standard logic cell%FPGA
基于点对点GALS模型,给出了异步封装电路的信号状态转换图(STG),基于Petrify设计了一种基于标准逻辑单元的GALS异步封装电路,包括同步/异步接口电路、具有分频及暂停功能的局部时钟等设计.由于所设计的异步封装电路具有不存在延时器件、没有使用特殊的异步逻辑单元等特点,所以论文基于两个同步计数器实现了GALS点对点模型进行仿真和FPGA验证,结果显示了整个异步封装及其GALS系统性能的正确性.
基于點對點GALS模型,給齣瞭異步封裝電路的信號狀態轉換圖(STG),基于Petrify設計瞭一種基于標準邏輯單元的GALS異步封裝電路,包括同步/異步接口電路、具有分頻及暫停功能的跼部時鐘等設計.由于所設計的異步封裝電路具有不存在延時器件、沒有使用特殊的異步邏輯單元等特點,所以論文基于兩箇同步計數器實現瞭GALS點對點模型進行倣真和FPGA驗證,結果顯示瞭整箇異步封裝及其GALS繫統性能的正確性.
기우점대점GALS모형,급출료이보봉장전로적신호상태전환도(STG),기우Petrify설계료일충기우표준라집단원적GALS이보봉장전로,포괄동보/이보접구전로、구유분빈급잠정공능적국부시종등설계.유우소설계적이보봉장전로구유불존재연시기건、몰유사용특수적이보라집단원등특점,소이논문기우량개동보계수기실현료GALS점대점모형진행방진화FPGA험증,결과현시료정개이보봉장급기GALS계통성능적정학성.
Based on the point to point GALS model, the signal transition graph of the asynchronous wrapper is presented. A novel asynchronous wrapper for GALS systems is presented in Petrify based on the standard logic cell. The synchronous and asynchronous interface circuits, local clock circuits with frequency dividing and pause function are included in the wrapper. Because the wrapper does not include delay device and special asynchronous elements, the GALS system with the asynchronous wrapper can be verified directly in FPGA based on two synchronous counters. The simulating and verifying results for point to point GALS model show that the asynchronous GALS wrapper can operate accurately.
