CAJ | 학술논문

随着电子芯片向着高密度、高频率和小体积化方向发展，IC封装的结构尺寸及其互连线系统在信号完整性、损耗等多方面影响着整个电路系统的可靠性。因此，对IC封装及其互连线电特性的分析显得尤为重要。文章以四列直插芯片封装外壳模型为设计实例，利用AnsoftQ3D软件提取了该封装模型的寄生电阻、电容和电感（RCL），并结合Multisim软件对封装互连线上的信号完整性进行了简单的Ⅱ端口等效电路分析。从中认识到，随着频率的升高，由于寄生参数特别是寄生电感的存在，IC信号的性能会随之降低。IC封装设计者应使用协同设计的方法和理念，在有效提高封装电特性的同时降低封装成本及研发周期。
수착전자심편향착고밀도、고빈솔화소체적화방향발전，IC봉장적결구척촌급기호련선계통재신호완정성、손모등다방면영향착정개전로계통적가고성。인차，대IC봉장급기호련선전특성적분석현득우위중요。문장이사렬직삽심편봉장외각모형위설계실례，이용AnsoftQ3D연건제취료해봉장모형적기생전조、전용화전감（RCL），병결합Multisim연건대봉장호련선상적신호완정성진행료간단적Ⅱ단구등효전로분석。종중인식도，수착빈솔적승고，유우기생삼수특별시기생전감적존재，IC신호적성능회수지강저。IC봉장설계자응사용협동설계적방법화이념，재유효제고봉장전특성적동시강저봉장성본급연발주기。
With the IC chip is moving toward to high-density, high frequency and small size, the structure of the IC package and the interconnection has a great influence on the system reliability in the aspect of signal integrity and loss. So, we have to pay attention to the analysis of the electrical characteristics of IC package and the interconnection. A real example of four split in line IC package was used to extract the parasitic of RLC with the Ansoft Q3D software. At the same time, the signal integrity of the intercormection has been analyzed by a two-port circuit model with the Multisim software. Then the conclusion can be obtained that the performance of IC signal will drop bec, ause of the parasitic in the package as frequency goes higher. The package designer should use the idea and method of the co-design to improve the electrical characteristics of packaging meanwhile reducing the packaging costs and shortening the research cycle effectively.