红外与激光工程
紅外與激光工程
홍외여격광공정
INFRARED AND LASER ENGINEERING
2014年
8期
2602-2606
,共5页
成像系统%行间转移型面阵 CCD%驱动设计%视频处理
成像繫統%行間轉移型麵陣 CCD%驅動設計%視頻處理
성상계통%행간전이형면진 CCD%구동설계%시빈처리
imaging system%interline area CCD%driver design%video processing
采用行间转移型面阵 CCD KAI-1020作为图像传感器，以现场可编程门阵列(FPGA)为核心控制器，设计并实现了一个完整的成像系统。FPGA 产生驱动时序、控制 CCD 上电顺序、调节曝光时间，并实现数据缓存。CCD 模拟视频信号经过预处理，通过同轴电缆传输到 CCD 专用视频处理器进行相关双采样和模数转换，以10位像素深度输出到 FPGA，数字视频信号经过差分芯片驱动以低压差分信号(LVDS)格式输出到数据采集卡。集成化视频处理电路提高了系统的信噪比，改善了成像质量。实验表明，CCD 成像系统工作稳定可靠，像素读出时钟为10 MHz 时，帧频为10帧/s。设计的 CCD成像系统性能好、可靠性高、实现周期短，具有很强的可扩展性。
採用行間轉移型麵陣 CCD KAI-1020作為圖像傳感器，以現場可編程門陣列(FPGA)為覈心控製器，設計併實現瞭一箇完整的成像繫統。FPGA 產生驅動時序、控製 CCD 上電順序、調節曝光時間，併實現數據緩存。CCD 模擬視頻信號經過預處理，通過同軸電纜傳輸到 CCD 專用視頻處理器進行相關雙採樣和模數轉換，以10位像素深度輸齣到 FPGA，數字視頻信號經過差分芯片驅動以低壓差分信號(LVDS)格式輸齣到數據採集卡。集成化視頻處理電路提高瞭繫統的信譟比，改善瞭成像質量。實驗錶明，CCD 成像繫統工作穩定可靠，像素讀齣時鐘為10 MHz 時，幀頻為10幀/s。設計的 CCD成像繫統性能好、可靠性高、實現週期短，具有很彊的可擴展性。
채용행간전이형면진 CCD KAI-1020작위도상전감기，이현장가편정문진렬(FPGA)위핵심공제기，설계병실현료일개완정적성상계통。FPGA 산생구동시서、공제 CCD 상전순서、조절폭광시간，병실현수거완존。CCD 모의시빈신호경과예처리，통과동축전람전수도 CCD 전용시빈처리기진행상관쌍채양화모수전환，이10위상소심도수출도 FPGA，수자시빈신호경과차분심편구동이저압차분신호(LVDS)격식수출도수거채집잡。집성화시빈처리전로제고료계통적신조비，개선료성상질량。실험표명，CCD 성상계통공작은정가고，상소독출시종위10 MHz 시，정빈위10정/s。설계적 CCD성상계통성능호、가고성고、실현주기단，구유흔강적가확전성。
A complete imaging system was designed and implemented by using a interline CCD KAI -1020 as image sensor. Field-Programmable Gate Array (FPGA) was adopted as the core controller of the whole system, which generated driving sequences, controlled the CCD power-up sequence, adjusted the exposure time and realized data cache. After preprocessing, CCD analog video output was transferred via coaxial cable to the dedicated CCD signal processor for correlated double sampling (CDS) and analog-digital conversion, and it finally outputted to FPGA in the form of 10 -bit digital signal. CCD digital video signal was drove by differential line driver and then acquired by the image acquisition card in low voltage differential signaling (LVDS) format. The use of integrated CCD signal processor improved the system′ s signal to noise ratio and enhanced the image quality. Experimental results show that the designed CCD imaging system works normally and stably, the frame rate is 10 frames/s when the pixel readout clock is 10 MHz. The designed CCD imaging system characterizes good performance, high reliability, and short implementation cycle and provides high expansibility.
