CAJ | 학술논문

从通道互连结构角度考虑，该文提出一种降低FPGA中开关矩阵漏电流的方法。根据漏电流与电路输入、输出状态有关的结论，利用连线开关盒(SWB)对信号的传输特性，将FPGA中开关矩阵的漏电优化等效在小规模的矩阵单元中实现。因为能够在有限的输出状态组合中搜寻最小漏电状态，相比仅通过电平恢复器确定SWB输出状态的方法，该算法能有效地降低漏电流，并且兼容电路级的漏电流优化方法。
종통도호련결구각도고필，해문제출일충강저FPGA중개관구진루전류적방법。근거루전류여전로수입、수출상태유관적결론，이용련선개관합(SWB)대신호적전수특성，장FPGA중개관구진적루전우화등효재소규모적구진단원중실현。인위능구재유한적수출상태조합중수심최소루전상태，상비부통과전평회복기학정SWB수출상태적방법，해산법능유효지강저루전류，병차겸용전로급적루전류우화방법。
From the perspective of routing architecture, a leakage reduction method of switch matrixes in FPGA is proposed. Based on the conclusion of state-dependent leakage, the lowest leakage current of switch matrixes in FPGA is equivalently computed in a small size of matrix cell using the transition property of SWitch Box (SWB). Because the presented algorithm could research the lowest leakage state in finite SWB output state combinations, rather than confirming SWB output state by level-restoring circuit, the algorithm is used for efficient reduction of leakage in switch matrixes and is compatible with the optimization of leakage at the circuit-level.