CAJ | 학술논문

该文针对均匀采样脉冲宽度调制(UPWM)型数字D类功放，提出了一种新的伪自然采样算法以校正其在开关信号调制时产生的谐波失真。该算法融合了三阶和一阶拉格朗日插值法，并结合伪自然采样点位置判断法而形成，可在计算复杂度较低的同时，达到较好的谐波失真校正效果。该文使用FPGA搭建了一个基于该算法以及其它同类算法的开关信号调制器测试系统。测试结果表明，相比同类算法，该算法基本消除了谐波失真且硬件消耗适中，显示了更大的优越性。
해문침대균균채양맥충관도조제(UPWM)형수자D류공방，제출료일충신적위자연채양산법이교정기재개관신호조제시산생적해파실진。해산법융합료삼계화일계랍격랑일삽치법，병결합위자연채양점위치판단법이형성，가재계산복잡도교저적동시，체도교호적해파실진교정효과。해문사용FPGA탑건료일개기우해산법이급기타동류산법적개관신호조제기측시계통。측시결과표명，상비동류산법，해산법기본소제료해파실진차경건소모괄중，현시료경대적우월성。
A new pseudo natural sampling algorithm is proposed in this paper for correcting the harmonic distortion produced by switching signal modulation in Uniform sampled Pulse Width Modulation (UPWM) digital class D power amplifiers. This algorithm combines the 3th-order and 1st-order Lagrange interpolation methods and adopts a position judging method for pseudo natural sampling point to obtain an expected harmonic distortion correction effect and computation complexity. A switching signal modulator test system based on FPGA is built to test the proposed algorithm and other kindred algorithms. The test results show that the proposed algorithm basically eliminates the harmonic distortion with modest hardware consumption and is better than other kindred algorithms.