CAJ | 학술논문

为了满足图像应用对椒盐噪声高性能实时处理的需求，解决传统设计方法仅能针对特定滤波算法实现固定参数的限制，在粗颗粒度可重构架构上映射实现了多种中值滤波算法．通过分析中值滤波算法的计算数据特点，探索出滤波算法在重构架构的数据并行和重用方法．同时，通过优化可重构计算单元的微结构设计来适应中值滤波算法的映射，扩展重构计算单元的输出端口设计，引入分布式跨域寄存器．实验结果表明，采用SMIC 130 nm CMOS工艺实现100 MHz系统主频，可以获得最高75．21×106像素/s的像素处理速率．可重构方法可以灵活实现多种中值滤波算法，满足不同复杂度和分辨率下图像的实时处理需求．
위료만족도상응용대초염조성고성능실시처리적수구，해결전통설계방법부능침대특정려파산법실현고정삼수적한제，재조과립도가중구가구상영사실현료다충중치려파산법．통과분석중치려파산법적계산수거특점，탐색출려파산법재중구가구적수거병행화중용방법．동시，통과우화가중구계산단원적미결구설계래괄응중치려파산법적영사，확전중구계산단원적수출단구설계，인입분포식과역기존기．실험결과표명，채용SMIC 130 nm CMOS공예실현100 MHz계통주빈，가이획득최고75．21×106상소/s적상소처리속솔．가중구방법가이령활실현다충중치려파산법，만족불동복잡도화분변솔하도상적실시처리수구．
In order to meet the needs of real-time processing salt and pepper noise on the image and resolve the limits of traditional design methods with fixed parameters for particular filtering algo-rithms, several median filtering algorithms are proposed on a coarse grained reconfigurable architec-ture.Considering both the data and computing features of median filtering algorithms, the approach for data parallel and reuse is explored on reconfigurable architecture.Meanwhile, micro-structural optimization for reconfigurable computing architecture is developed to suit the efficient median filte-ring algorithm mapping.Both the reconfigurable computing output port and distributed cross register file are introduced.The experimental results show that by adopting the SMIC ( Semiconductor Manu-facturing International Corporation ) 130 nm CMOS ( complementary metal-oxide-semiconductor transistor) process to realize a system frequency of 100 MHz, the highest pixel processing rate up to 75.21 ×106 pixel/s can be achieved.The reconfigurable method can offer flexibility to achieve a va-riety of median filtering algorithms to meet real-time image processing requirements with different complexities and resolutions.