电光与控制
電光與控製
전광여공제
ELECTRONICS OPTICS & CONTROL
2014年
5期
92-96
,共5页
薛冰%冯长江%王聪丽%张泽建
薛冰%馮長江%王聰麗%張澤建
설빙%풍장강%왕총려%장택건
模拟集成电路%可测性设计%功能测试%IEEE 1149.4%FPGA
模擬集成電路%可測性設計%功能測試%IEEE 1149.4%FPGA
모의집성전로%가측성설계%공능측시%IEEE 1149.4%FPGA
analog integrated circuit%testability design%function test%IEEE 1149 .4%FPGA
提出了一种基于边界扫描技术的模拟集成电路内建自测试方案。该方案依照IEEE 1149.4边界扫描测试标准,在添加极少电路元件的基础上,增加了电路性能测试单元( FTM ),能够充分利用电路系统中已有数模混合资源,通过控制器内部向被测电路施加激励,完成模拟集成电路的功能性测试。采用Cyclone II系列芯片EP2C35F672C8实现测试系统设计,并以模拟集成滤波芯片MAX292为被测核心电路展开实验,其频率特性的测试结果表明了该测试方案的正确性和系统测试的有效性。
提齣瞭一種基于邊界掃描技術的模擬集成電路內建自測試方案。該方案依照IEEE 1149.4邊界掃描測試標準,在添加極少電路元件的基礎上,增加瞭電路性能測試單元( FTM ),能夠充分利用電路繫統中已有數模混閤資源,通過控製器內部嚮被測電路施加激勵,完成模擬集成電路的功能性測試。採用Cyclone II繫列芯片EP2C35F672C8實現測試繫統設計,併以模擬集成濾波芯片MAX292為被測覈心電路展開實驗,其頻率特性的測試結果錶明瞭該測試方案的正確性和繫統測試的有效性。
제출료일충기우변계소묘기술적모의집성전로내건자측시방안。해방안의조IEEE 1149.4변계소묘측시표준,재첨가겁소전로원건적기출상,증가료전로성능측시단원( FTM ),능구충분이용전로계통중이유수모혼합자원,통과공제기내부향피측전로시가격려,완성모의집성전로적공능성측시。채용Cyclone II계렬심편EP2C35F672C8실현측시계통설계,병이모의집성려파심편MAX292위피측핵심전로전개실험,기빈솔특성적측시결과표명료해측시방안적정학성화계통측시적유효성。
A built-in-test scheme was proposed based on boundary scan technology for analog integrated circuit.Based on IEEE 1149.4 standard and with few added circuit elements,a function test module (FTM) was designed to complete the functional test by making full use of the existing mixed -signal circuit system resources and stimulating the circuit-under-test.A boundary scan testing system based on FPGA was designed by using the analog integrated chip MAX 292 .The frequency characteristic test result proved the correctness of the test scheme and the effectiveness of the system test .